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Author Topic: STM32: Debug in SRAM, one FPC issue  (Read 1586 times)

Peacoor

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STM32: Debug in SRAM, one FPC issue
« on: August 02, 2023, 03:59:54 pm »
I am using FPC and Lazarus to do some STM32 programming. I found that the download speed in flash is slow, and the flash memory has a limited number of erase times, and I like running code with small changes.

So, I think running in the internal SRAM is better, with fast speed and unlimited read and write times.

In fpcupdeluxe (or build rtl by hand), add -dREMAP_VECTTAB to build options, this will enable some code in cortexm0_start.inc, cortexm3_start.inc and cortexm4_startf.inc which allow interrupts.

Switch the platform in Lazarus, and add -WpSTM32XX (which use) and -sT to compiler options, build and it would generate xxx_link.res and xxx_ppas.sh on the project directory, open the xxx_link.res, replace the code (depending on the chip, the LENGTH is different):

Code: [Select]
MEMORY
{
    flash : ORIGIN = 0x08000000, LENGTH = 0x00100000
    ram : ORIGIN = 0x20000000, LENGTH = 0x00020000
}

with

Code: [Select]
MEMORY
{
    flash : ORIGIN = 0x20000000, LENGTH = 0x00010000
    ram : ORIGIN = 0x20010000, LENGTH = 0x00010000
}

Note the SRAM size your chip has, My STM32F407ZG has 128KB SRAM from 0x20000000 to 0x2001FFFF.

Run the xxx_ppas.sh, use arm-none-eabi-gdb to load the elf, and can debug in command line (download is really fast).

I want to debug in Lazarus not the terminal, I don't know how to pass some parameters to let FPC set the flash and ram as I need. Or use -k to pass some parameters to gnu ld (I tried some, but failed), or it is impossible for the current version(trunk)? Maybe can make a feature request?

Does anyone know it?

Laksen

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Re: STM32: Debug in SRAM, one FPC issue
« Reply #1 on: August 02, 2023, 08:31:54 pm »
I'm guessing that the only change would be to supply the new linker script to ld

To do that you can add
Code: [Select]
-k-Tlink.res in the projects settings custom options. link.res being your modified linker script

Peacoor

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Re: STM32: Debug in SRAM, one FPC issue
« Reply #2 on: August 03, 2023, 09:54:47 am »
I'm guessing that the only change would be to supply the new linker script to ld

To do that you can add
Code: [Select]
-k-Tlink.res in the projects settings custom options. link.res being your modified linker script

Thanks for the reply, however, it's a pity that the compiler ignore the link.res.

Peacoor

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Re: STM32: Debug in SRAM, one FPC issue
« Reply #3 on: August 04, 2023, 09:43:58 am »
I found the code in compiler/systems/t_embed.pas

Code: Pascal  [Select][+][-]
  1.         begin
  2.          with embedded_controllers[current_settings.controllertype] do
  3.           with linkres do
  4.             begin
  5.               if (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D5')
  6.               or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D7')
  7.               or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK22F51212')
  8.               or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK64F12') then
  9.                 Add('ENTRY(_LOWLEVELSTART)')
  10.               else
  11.                 Add('ENTRY(_START)');
  12.               Add('MEMORY');
  13.               Add('{');
  14.               if flashsize<>0 then
  15.                 begin
  16.                   LinkStr := '    flash : ORIGIN = 0x' + IntToHex(flashbase,8)
  17.                     + ', LENGTH = 0x' + IntToHex(flashsize,8);
  18.                   Add(LinkStr);
  19.                 end;
  20.  
  21.               LinkStr := '    ram : ORIGIN = 0x' + IntToHex(srambase,8)
  22.                 + ', LENGTH = 0x' + IntToHex(sramsize,8);
  23.               Add(LinkStr);
  24.  
  25.               Add('}');
  26.               Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';');
  27.  
  28.               // Add Checksum Calculation for LPC Controllers so that the bootloader starts the uploaded binary
  29.               writeln(controllerunitstr);
  30.               if (controllerunitstr = 'LPC8xx') or (controllerunitstr = 'LPC11XX') or (controllerunitstr = 'LPC122X') then
  31.                 Add('Startup_Checksum = 0 - (_stack_top + _START + 1 + NonMaskableInt_interrupt + 1 + Hardfault_interrupt + 1);');
  32.               if (controllerunitstr = 'LPC13XX') then
  33.                 Add('Startup_Checksum = 0 - (_stack_top + _START + 1 + NonMaskableInt_interrupt + 1 + MemoryManagement_interrupt + 1 + BusFault_interrupt + 1 + UsageFault_interrupt + 1);');
  34.             end;
  35.         end
  36.  

The flash and ram information were hardcoded in embedded_controllers of cpuinfo.pas, unless change the compiler, or cannot specify flash and ram.

I'm curious if adding a compiler option to specify the flash and ram of the MCU is feasible.

 

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