unit ATmega32;
// Individual bit access constants
const B0 = 0;
const B1 = 1;
const B2 = 2;
const B3 = 3;
const B4 = 4;
const B5 = 5;
const B6 = 6;
const B7 = 7;
const __FLASH_SIZE : dword = 0x00008000;
// Flash page size in program words
const __FLASH_PAGE_SIZE = 64;
const ICS_AUTO = 0;
const ICS_OFF = 3;
// Addres offset from Output and Input (port) registers
const OUTPUT_TO_INPUT_OFFSET : short = -2;
var
// Rx space registers
R0 : byte; absolute 0x00; rx; sfr;
R1 : byte; absolute 0x01; rx; sfr;
R2 : byte; absolute 0x02; rx; sfr;
R3 : byte; absolute 0x03; rx; sfr;
R4 : byte; absolute 0x04; rx; sfr;
R5 : byte; absolute 0x05; rx; sfr;
R6 : byte; absolute 0x06; rx; sfr;
R7 : byte; absolute 0x07; rx; sfr;
R8 : byte; absolute 0x08; rx; sfr;
R9 : byte; absolute 0x09; rx; sfr;
R10 : byte; absolute 0x0A; rx; sfr;
R11 : byte; absolute 0x0B; rx; sfr;
R12 : byte; absolute 0x0C; rx; sfr;
R13 : byte; absolute 0x0D; rx; sfr;
R14 : byte; absolute 0x0E; rx; sfr;
R15 : byte; absolute 0x0F; rx; sfr;
R16 : byte; absolute 0x10; rx; sfr;
R17 : byte; absolute 0x11; rx; sfr;
R18 : byte; absolute 0x12; rx; sfr;
R19 : byte; absolute 0x13; rx; sfr;
R20 : byte; absolute 0x14; rx; sfr;
R21 : byte; absolute 0x15; rx; sfr;
R22 : byte; absolute 0x16; rx; sfr;
R23 : byte; absolute 0x17; rx; sfr;
R24 : byte; absolute 0x18; rx; sfr;
R25 : byte; absolute 0x19; rx; sfr;
R26 : byte; absolute 0x1A; rx; sfr;
R27 : byte; absolute 0x1B; rx; sfr;
R28 : byte; absolute 0x1C; rx; sfr;
R29 : byte; absolute 0x1D; rx; sfr;
R30 : byte; absolute 0x1E; rx; sfr;
R31 : byte; absolute 0x1F; rx; sfr;
// X, Y and Z registers
XL : byte; absolute 0x1A; rx; sfr;
XH : byte; absolute 0x1B; rx; sfr;
YL : byte; absolute 0x1C; rx; sfr;
YH : byte; absolute 0x1D; rx; sfr;
ZL : byte; absolute 0x1E; rx; sfr;
ZH : byte; absolute 0x1F; rx; sfr;
X : word; absolute 0x1A; rx; sfr;
Y : word; absolute 0x1C; rx; sfr;
Z : word; absolute 0x1E; rx; sfr;
const IVT_ADDR_RESET = 0x0000;
const IVT_ADDR_INT0 = 0x0002;
const IVT_ADDR_INT1 = 0x0004;
const IVT_ADDR_INT2 = 0x0006;
const IVT_ADDR_TIMER2_COMP = 0x0008;
const IVT_ADDR_TIMER2_OVF = 0x000A;
const IVT_ADDR_TIMER1_CAPT = 0x000C;
const IVT_ADDR_TIMER1_COMPA = 0x000E;
const IVT_ADDR_TIMER1_COMPB = 0x0010;
const IVT_ADDR_TIMER1_OVF = 0x0012;
const IVT_ADDR_TIMER0_COMP = 0x0014;
const IVT_ADDR_TIMER0_OVF = 0x0016;
const IVT_ADDR_SPI__STC = 0x0018;
const IVT_ADDR_USART__RXC = 0x001A;
const IVT_ADDR_USART__UDRE = 0x001C;
const IVT_ADDR_USART__TXC = 0x001E;
const IVT_ADDR_ADC = 0x0020;
const IVT_ADDR_EE_RDY = 0x0022;
const IVT_ADDR_ANA_COMP = 0x0024;
const IVT_ADDR_TWI = 0x0026;
const IVT_ADDR_SPM_RDY = 0x0028;
var SREG : byte; absolute 0x5F; io; volatile; sfr;
var SREG_C_bit : sbit at SREG.B0;
const SREG_C = 0; register;
var SREG_Z_bit : sbit at SREG.B1;
const SREG_Z = 1; register;
var SREG_N_bit : sbit at SREG.B2;
const SREG_N = 2; register;
var SREG_V_bit : sbit at SREG.B3;
const SREG_V = 3; register;
var SREG_S_bit : sbit at SREG.B4;
const SREG_S = 4; register;
var SREG_H_bit : sbit at SREG.B5;
const SREG_H = 5; register;
var SREG_T_bit : sbit at SREG.B6;
const SREG_T = 6; register;
var SREG_I_bit : sbit at SREG.B7;
const SREG_I = 7; register;
var PINA : byte; absolute 0x39; io; volatile; sfr;
var PINA0_bit : sbit at PINA.B0;
const PINA0 = 0; register;
var PINA1_bit : sbit at PINA.B1;
const PINA1 = 1; register;
var PINA2_bit : sbit at PINA.B2;
const PINA2 = 2; register;
var PINA3_bit : sbit at PINA.B3;
const PINA3 = 3; register;
var PINA4_bit : sbit at PINA.B4;
const PINA4 = 4; register;
var PINA5_bit : sbit at PINA.B5;
const PINA5 = 5; register;
var PINA6_bit : sbit at PINA.B6;
const PINA6 = 6; register;
var PINA7_bit : sbit at PINA.B7;
const PINA7 = 7; register;
var PORTB : byte; absolute 0x38; io; sfr;
var PORTB0_bit : sbit at PORTB.B0;
const PORTB0 = 0; register;
var PORTB1_bit : sbit at PORTB.B1;
const PORTB1 = 1; register;
var PORTB2_bit : sbit at PORTB.B2;
const PORTB2 = 2; register;
var PORTB3_bit : sbit at PORTB.B3;
const PORTB3 = 3; register;
var PORTB4_bit : sbit at PORTB.B4;
const PORTB4 = 4; register;
var PORTB5_bit : sbit at PORTB.B5;
const PORTB5 = 5; register;
var PORTB6_bit : sbit at PORTB.B6;
const PORTB6 = 6; register;
var PORTB7_bit : sbit at PORTB.B7;
const PORTB7 = 7; register;
var DDRB : byte; absolute 0x37; io; sfr;
var DDB0_bit : sbit at DDRB.B0;
const DDB0 = 0; register;
var DDB1_bit : sbit at DDRB.B1;
const DDB1 = 1; register;
var DDB2_bit : sbit at DDRB.B2;
const DDB2 = 2; register;
var DDB3_bit : sbit at DDRB.B3;
const DDB3 = 3; register;
var DDB4_bit : sbit at DDRB.B4;
const DDB4 = 4; register;
var DDB5_bit : sbit at DDRB.B5;
const DDB5 = 5; register;
var DDB6_bit : sbit at DDRB.B6;
const DDB6 = 6; register;
var DDB7_bit : sbit at DDRB.B7;
const DDB7 = 7; register;
var PINB : byte; absolute 0x36; io; volatile; sfr;
var PINB0_bit : sbit at PINB.B0;
const PINB0 = 0; register;
var PINB1_bit : sbit at PINB.B1;
const PINB1 = 1; register;
var PINB2_bit : sbit at PINB.B2;
const PINB2 = 2; register;
var PINB3_bit : sbit at PINB.B3;
const PINB3 = 3; register;
var PINB4_bit : sbit at PINB.B4;
const PINB4 = 4; register;
var PINB5_bit : sbit at PINB.B5;
const PINB5 = 5; register;
var PINB6_bit : sbit at PINB.B6;
const PINB6 = 6; register;
var PINB7_bit : sbit at PINB.B7;
const PINB7 = 7; register;
var PORTC : byte; absolute 0x35; io; sfr;
var PORTC0_bit : sbit at PORTC.B0;
const PORTC0 = 0; register;
var PORTC1_bit : sbit at PORTC.B1;
const PORTC1 = 1; register;
var PORTC2_bit : sbit at PORTC.B2;
const PORTC2 = 2; register;
var PORTC3_bit : sbit at PORTC.B3;
const PORTC3 = 3; register;
var PORTC4_bit : sbit at PORTC.B4;
const PORTC4 = 4; register;
var PORTC5_bit : sbit at PORTC.B5;
const PORTC5 = 5; register;
var PORTC6_bit : sbit at PORTC.B6;
const PORTC6 = 6; register;
var PORTC7_bit : sbit at PORTC.B7;
const PORTC7 = 7; register;
var DDRC : byte; absolute 0x34; io; sfr;
var DDC0_bit : sbit at DDRC.B0;
const DDC0 = 0; register;
var DDC1_bit : sbit at DDRC.B1;
const DDC1 = 1; register;
var DDC2_bit : sbit at DDRC.B2;
const DDC2 = 2; register;
var DDC3_bit : sbit at DDRC.B3;
const DDC3 = 3; register;
var DDC4_bit : sbit at DDRC.B4;
const DDC4 = 4; register;
var DDC5_bit : sbit at DDRC.B5;
const DDC5 = 5; register;
var DDC6_bit : sbit at DDRC.B6;
const DDC6 = 6; register;
var DDC7_bit : sbit at DDRC.B7;
const DDC7 = 7; register;
var TCCR1B : byte; absolute 0x4E; io; sfr;
var CS10_bit : sbit at TCCR1B.B0;
const CS10 = 0; register;
var CS11_bit : sbit at TCCR1B.B1;
const CS11 = 1; register;
var CS12_bit : sbit at TCCR1B.B2;
const CS12 = 2; register;
var WGM12_bit : sbit at TCCR1B.B3;
const WGM12 = 3; register;
var WGM13_bit : sbit at TCCR1B.B4;
const WGM13 = 4; register;
var ICES1_bit : sbit at TCCR1B.B6;
const ICES1 = 6; register;
var ICNC1_bit : sbit at TCCR1B.B7;
const ICNC1 = 7; register;
var TCNT1H : byte; absolute 0x4D; io; volatile; sfr;
var TCNT1H0_bit : sbit at TCNT1H.B0;
const TCNT1H0 = 0; register;
var TCNT1H1_bit : sbit at TCNT1H.B1;
const TCNT1H1 = 1; register;
var TCNT1H2_bit : sbit at TCNT1H.B2;
const TCNT1H2 = 2; register;
var TCNT1H3_bit : sbit at TCNT1H.B3;
const TCNT1H3 = 3; register;
var TCNT1H4_bit : sbit at TCNT1H.B4;
const TCNT1H4 = 4; register;
var TCNT1H5_bit : sbit at TCNT1H.B5;
const TCNT1H5 = 5; register;
var TCNT1H6_bit : sbit at TCNT1H.B6;
const TCNT1H6 = 6; register;
var TCNT1H7_bit : sbit at TCNT1H.B7;
const TCNT1H7 = 7; register;
var TCNT1L : byte; absolute 0x4C; io; volatile; sfr;
var TCNT1L0_bit : sbit at TCNT1L.B0;
const TCNT1L0 = 0; register;
var TCNT1L1_bit : sbit at TCNT1L.B1;
const TCNT1L1 = 1; register;
var TCNT1L2_bit : sbit at TCNT1L.B2;
const TCNT1L2 = 2; register;
var TCNT1L3_bit : sbit at TCNT1L.B3;
const TCNT1L3 = 3; register;
var TCNT1L4_bit : sbit at TCNT1L.B4;
const TCNT1L4 = 4; register;
var TCNT1L5_bit : sbit at TCNT1L.B5;
const TCNT1L5 = 5; register;
var TCNT1L6_bit : sbit at TCNT1L.B6;
const TCNT1L6 = 6; register;
var TCNT1L7_bit : sbit at TCNT1L.B7;
const TCNT1L7 = 7; register;
var OCR1AH : byte; absolute 0x4B; io; sfr;
var OCR1AH0_bit : sbit at OCR1AH.B0;
const OCR1AH0 = 0; register;
var OCR1AH1_bit : sbit at OCR1AH.B1;
const OCR1AH1 = 1; register;
var OCR1AH2_bit : sbit at OCR1AH.B2;
const OCR1AH2 = 2; register;
var OCR1AH3_bit : sbit at OCR1AH.B3;
const OCR1AH3 = 3; register;
var OCR1AH4_bit : sbit at OCR1AH.B4;
const OCR1AH4 = 4; register;
var OCR1AH5_bit : sbit at OCR1AH.B5;
const OCR1AH5 = 5; register;
var OCR1AH6_bit : sbit at OCR1AH.B6;
const OCR1AH6 = 6; register;
var OCR1AH7_bit : sbit at OCR1AH.B7;
const OCR1AH7 = 7; register;
var OCR1AL : byte; absolute 0x4A; io; sfr;
var OCR1AL0_bit : sbit at OCR1AL.B0;
const OCR1AL0 = 0; register;
var OCR1AL1_bit : sbit at OCR1AL.B1;
const OCR1AL1 = 1; register;
var OCR1AL2_bit : sbit at OCR1AL.B2;
const OCR1AL2 = 2; register;
var OCR1AL3_bit : sbit at OCR1AL.B3;
const OCR1AL3 = 3; register;
var OCR1AL4_bit : sbit at OCR1AL.B4;
const OCR1AL4 = 4; register;
var OCR1AL5_bit : sbit at OCR1AL.B5;
const OCR1AL5 = 5; register;
var OCR1AL6_bit : sbit at OCR1AL.B6;
const OCR1AL6 = 6; register;
var OCR1AL7_bit : sbit at OCR1AL.B7;
const OCR1AL7 = 7; register;
var OCR1BH : byte; absolute 0x49; io; sfr;
var OCR1BH0_bit : sbit at OCR1BH.B0;
const OCR1BH0 = 0; register;
var OCR1BH1_bit : sbit at OCR1BH.B1;
const OCR1BH1 = 1; register;
var OCR1BH2_bit : sbit at OCR1BH.B2;
const OCR1BH2 = 2; register;
var OCR1BH3_bit : sbit at OCR1BH.B3;
const OCR1BH3 = 3; register;
var OCR1BH4_bit : sbit at OCR1BH.B4;
const OCR1BH4 = 4; register;
var OCR1BH5_bit : sbit at OCR1BH.B5;
const OCR1BH5 = 5; register;
var OCR1BH6_bit : sbit at OCR1BH.B6;
const OCR1BH6 = 6; register;
var OCR1BH7_bit : sbit at OCR1BH.B7;
const OCR1BH7 = 7; register;
var OCR1BL : byte; absolute 0x48; io; sfr;
var OCR1BL0_bit : sbit at OCR1BL.B0;
const OCR1BL0 = 0; register;
var OCR1BL1_bit : sbit at OCR1BL.B1;
const OCR1BL1 = 1; register;
var OCR1BL2_bit : sbit at OCR1BL.B2;
const OCR1BL2 = 2; register;
var OCR1BL3_bit : sbit at OCR1BL.B3;
const OCR1BL3 = 3; register;
var OCR1BL4_bit : sbit at OCR1BL.B4;
const OCR1BL4 = 4; register;
var OCR1BL5_bit : sbit at OCR1BL.B5;
const OCR1BL5 = 5; register;
var OCR1BL6_bit : sbit at OCR1BL.B6;
const OCR1BL6 = 6; register;
var OCR1BL7_bit : sbit at OCR1BL.B7;
const OCR1BL7 = 7; register;
var PORTC : byte; absolute 0x35; io; sfr;
var PORTC0_bit : sbit at PORTC.B0;
const PORTC0 = 0; register;
var PORTC1_bit : sbit at PORTC.B1;
const PORTC1 = 1; register;
var PORTC2_bit : sbit at PORTC.B2;
const PORTC2 = 2; register;
var PORTC3_bit : sbit at PORTC.B3;
const PORTC3 = 3; register;
var PORTC4_bit : sbit at PORTC.B4;
const PORTC4 = 4; register;
var PORTC5_bit : sbit at PORTC.B5;
const PORTC5 = 5; register;
var PORTC6_bit : sbit at PORTC.B6;
const PORTC6 = 6; register;
var PORTC7_bit : sbit at PORTC.B7;
const PORTC7 = 7; register;
var DDRC : byte; absolute 0x34; io; sfr;
var DDC0_bit : sbit at DDRC.B0;
const DDC0 = 0; register;
var DDC1_bit : sbit at DDRC.B1;
const DDC1 = 1; register;
var DDC2_bit : sbit at DDRC.B2;
const DDC2 = 2; register;
var DDC3_bit : sbit at DDRC.B3;
const DDC3 = 3; register;
var DDC4_bit : sbit at DDRC.B4;
const DDC4 = 4; register;
var DDC5_bit : sbit at DDRC.B5;
const DDC5 = 5; register;
var DDC6_bit : sbit at DDRC.B6;
const DDC6 = 6; register;
var DDC7_bit : sbit at DDRC.B7;
const DDC7 = 7; register;
var PINC : byte; absolute 0x33; io; volatile; sfr;
var PINC0_bit : sbit at PINC.B0;
const PINC0 = 0; register;
var PINC1_bit : sbit at PINC.B1;
const PINC1 = 1; register;
var PINC2_bit : sbit at PINC.B2;
const PINC2 = 2; register;
var PINC3_bit : sbit at PINC.B3;
const PINC3 = 3; register;
var PINC4_bit : sbit at PINC.B4;
const PINC4 = 4; register;
var PINC5_bit : sbit at PINC.B5;
const PINC5 = 5; register;
var PINC6_bit : sbit at PINC.B6;
const PINC6 = 6; register;
var PINC7_bit : sbit at PINC.B7;
const PINC7 = 7; register;
var PORTD : byte; absolute 0x32; io; sfr;
var PORTD0_bit : sbit at PORTD.B0;
const PORTD0 = 0; register;
var PORTD1_bit : sbit at PORTD.B1;
const PORTD1 = 1; register;
var PORTD2_bit : sbit at PORTD.B2;
const PORTD2 = 2; register;
var PORTD3_bit : sbit at PORTD.B3;
const PORTD3 = 3; register;
var PORTD4_bit : sbit at PORTD.B4;
const PORTD4 = 4; register;
var PORTD5_bit : sbit at PORTD.B5;
const PORTD5 = 5; register;
var PORTD6_bit : sbit at PORTD.B6;
const PORTD6 = 6; register;
var PORTD7_bit : sbit at PORTD.B7;
const PORTD7 = 7; register;
var DDRD : byte; absolute 0x31; io; sfr;
var DDD0_bit : sbit at DDRD.B0;
const DDD0 = 0; register;
var DDD1_bit : sbit at DDRD.B1;
const DDD1 = 1; register;
var DDD2_bit : sbit at DDRD.B2;
const DDD2 = 2; register;
var DDD3_bit : sbit at DDRD.B3;
const DDD3 = 3; register;
var DDD4_bit : sbit at DDRD.B4;
const DDD4 = 4; register;
var DDD5_bit : sbit at DDRD.B5;
const DDD5 = 5; register;
var DDD6_bit : sbit at DDRD.B6;
const DDD6 = 6; register;
var DDD7_bit : sbit at DDRD.B7;
const DDD7 = 7; register;
var PIND : byte; absolute 0x30; io; volatile; sfr;
var PIND0_bit : sbit at PIND.B0;
const PIND0 = 0; register;
var PIND1_bit : sbit at PIND.B1;
const PIND1 = 1; register;
var PIND2_bit : sbit at PIND.B2;
const PIND2 = 2; register;
var PIND3_bit : sbit at PIND.B3;
const PIND3 = 3; register;
var PIND4_bit : sbit at PIND.B4;
const PIND4 = 4; register;
var PIND5_bit : sbit at PIND.B5;
const PIND5 = 5; register;
var PIND6_bit : sbit at PIND.B6;
const PIND6 = 6; register;
var PIND7_bit : sbit at PIND.B7;
const PIND7 = 7; register;
var SPDR : byte; absolute 0x2F; io; volatile; sfr;
var SPDR0_bit : sbit at SPDR.B0;
const SPDR0 = 0; register;
var SPDR1_bit : sbit at SPDR.B1;
const SPDR1 = 1; register;
var SPDR2_bit : sbit at SPDR.B2;
const SPDR2 = 2; register;
var SPDR3_bit : sbit at SPDR.B3;
const SPDR3 = 3; register;
var SPDR4_bit : sbit at SPDR.B4;
const SPDR4 = 4; register;
var SPDR5_bit : sbit at SPDR.B5;
const SPDR5 = 5; register;
var SPDR6_bit : sbit at SPDR.B6;
const SPDR6 = 6; register;
var SPDR7_bit : sbit at SPDR.B7;
const SPDR7 = 7; register;
var SPSR : byte; absolute 0x2E; io; volatile; sfr;
var SPI2X_bit : sbit at SPSR.B0;
const SPI2X = 0; register;
var WCOL_bit : sbit at SPSR.B6;
const WCOL = 6; register;
var SPIF_bit : sbit at SPSR.B7;
const SPIF = 7; register;
var SPCR : byte; absolute 0x2D; io; sfr;
var SPR0_bit : sbit at SPCR.B0;
const SPR0 = 0; register;
var SPR1_bit : sbit at SPCR.B1;
const SPR1 = 1; register;
var CPHA_bit : sbit at SPCR.B2;
const CPHA = 2; register;
var CPOL_bit : sbit at SPCR.B3;
const CPOL = 3; register;
var MSTR_bit : sbit at SPCR.B4;
const MSTR = 4; register;
var DORD_bit : sbit at SPCR.B5;
const DORD = 5; register;
var SPE_bit : sbit at SPCR.B6;
const SPE = 6; register;
var SPIE_bit : sbit at SPCR.B7;
const SPIE = 7; register;
var UDR0 : byte; absolute 0x2C; io; volatile; sfr;
var UDR : byte; absolute 0x2C; io; volatile; sfr;
var UDR0__bit : sbit at UDR.B0;
const UDR0_ = 0; register;
var UDR1_bit : sbit at UDR.B1;
const UDR1 = 1; register;
var UDR2_bit : sbit at UDR.B2;
const UDR2 = 2; register;
var UDR3_bit : sbit at UDR.B3;
const UDR3 = 3; register;
var UDR4_bit : sbit at UDR.B4;
const UDR4 = 4; register;
var UDR5_bit : sbit at UDR.B5;
const UDR5 = 5; register;
var UDR6_bit : sbit at UDR.B6;
const UDR6 = 6; register;
var UDR7_bit : sbit at UDR.B7;
const UDR7 = 7; register;
implementation
end.