Lazarus

Programming => Operating Systems => Embedded => Topic started by: botster on January 04, 2022, 02:46:46 am

Title: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 04, 2022, 02:46:46 am
I am trying to set up FPC to use the Xtensa-FreeRTOS for ESP8266 by following the instructions at the Xtensa Wiki page (https://wiki.lazarus.freepascal.org/Xtensa#ESP8266).

I have installed the ESP8266-RTOS-SDK and successfully compiled and executed the hello_world example.

But, I get to the Build FPC section and read, "Change into the fpc directory [..]" What fpc directory? I don't see anywhere in the instructions where I was told to create one.

Reading further, in the Compile and run test program section, I read, "Create a hello world program [...]" How do I do that? Is there an example somewhere? Would it be something as simple as:
Code: Pascal  [Select][+][-]
  1. program Hello;
  2. begin
  3.   writeln ('Hello, world.');
  4. end.
  5.  
?
Or, how would I translate the FreeRTOS example (main program attached) to FreePascal? Is there an API reference?

Maybe I'm just dense because I find the instructions quite confusing.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 04, 2022, 06:59:42 am
I am trying to set up FPC to use the Xtensa-FreeRTOS for ESP8266 by following the instructions at the Xtensa Wiki page (https://wiki.lazarus.freepascal.org/Xtensa#ESP8266).

I have installed the ESP8266-RTOS-SDK and successfully compiled and executed the hello_world example.

But, I get to the Build FPC section and read, "Change into the fpc directory [..]" What fpc directory? I don't see anywhere in the instructions where I was told to create one.

Indeed not clear, I agree. Xtensa is only supported in the development version of fpc, so a recent copy of the main branch is required. See https://www.freepascal.org/develop.html for different ways to get the development version source - I suggest using git as this way updating the source is relatively easy once configured. Or use fpcupdeluxe which automates the whole process of downloading fpc source and building the cross compiler.
Quote

Reading further, in the Compile and run test program section, I read, "Create a hello world program [...]" How do I do that? Is there an example somewhere? Would it be something as simple as:
Code: Pascal  [Select][+][-]
  1. program Hello;
  2. begin
  3.   writeln ('Hello, world.');
  4. end.
  5.  
?

Yes, as easy as that.
Quote

Or, how would I translate the FreeRTOS example (main program attached) to FreePascal? Is there an API reference?

Maybe I'm just dense because I find the instructions quite confusing.
Some of the SDK has been translated in this  project (https://github.com/ccrause/fpc-esp-freertos). Have a look at the examples to see what is possible at the moment. Not fully updated, so feel free to post issues against the project.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: af0815 on January 04, 2022, 09:32:21 am
We have here a similar sounding thread https://forum.lazarus.freepascal.org/index.php/topic,57704.msg429396.html#msg429396

Actual i can compile with fpc on Windows 10 but not linking.

Edit:
Quote
Or use fpcupdeluxe which automates the whole process of downloading fpc source and building the cross compiler.
fpcupdeluxe load his own (older ?) toolchain and this have some problems with the esp8266. It looks it is more tested for the stm32, not for esp8266. Because it will use the stm32 crosscompiler (lx6) instead of the lx106 crosscompiler.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: DonAlfredo on January 04, 2022, 09:53:31 am
 I can confirm this issue for lx106. Will look into it.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: DonAlfredo on January 04, 2022, 10:10:24 am
Update.

This issue cannot be resolved for Windows at the moment unfortunately.
Precompiled tools from GitHub are used: https://github.com/michael-ring/espsdk4fpc/releases
And these tools are not available for Windows [yet].

However. It should be possible to install the xtensa tools yourself from the appropriate sources on the Web.
And point FPC to use these tools.
https://docs.espressif.com/projects/esp8266-rtos-sdk/en/latest/get-started/windows-setup.html
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: af0815 on January 04, 2022, 12:04:52 pm
First step to build the crosscompiler is to patch fpcupdeluxe - m_any_to_freertosxtensa.pas
Code: Pascal  [Select][+][-]
  1. function TAny_FreeRTOSXtensa.GetBinUtils(Basepath:string): boolean;
  2. var
  3.   AsFile: string;
  4.   S,PresetBinPath:string;
  5. begin
  6.   result:=inherited;
  7.   if result then exit;
  8.  
  9.   if (FSubArch=TSUBARCH.lx6) then
  10.     FBinUtilsPrefix:=GetCPU(TargetCPU)+'-esp32-elf-';
  11.   if (FSubArch=TSUBARCH.lx106) then
  12.     FBinUtilsPrefix:=GetCPU(TargetCPU)+'-lx106-elf-';
  13.  
  14.   // Start with any names user may have given
  15.   AsFile:=FBinUtilsPrefix+'as'+GetExeExt;
  16.  
  17.  
I have to built the tools from espressif with their mysys32 enviroment.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: af0815 on January 04, 2022, 01:07:12 pm
I have the helloworld in the SDK under MYSYS32 compiled. The full result is here https://drive.google.com/file/d/1TLg1UTOWFNlaaj-bzS5N5BBKKWivQ3yE/view?usp=sharing
This is the whole HelloWorld including all the files from build.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 04, 2022, 07:51:44 pm
Indeed not clear, I agree. Xtensa is only supported in the development version of fpc, so a recent copy of the main branch is required. See https://www.freepascal.org/develop.html for different ways to get the development version source - I suggest using git as this way updating the source is relatively easy once configured. Or use fpcupdeluxe which automates the whole process of downloading fpc source and building the cross compiler.
Ah, okay. So the "fpc directory" should be the "fpc source directory". Got it.

Thank you.

Quote
Some of the SDK has been translated in this  project (https://github.com/ccrause/fpc-esp-freertos). Have a look at the examples to see what is possible at the moment. Not fully updated, so feel free to post issues against the project.
That looks very interesting. I'll have to delve into it when I have a bit more time.

I see that you have posted regarding an update (https://forum.lazarus.freepascal.org/index.php/topic,57732.0.html) to the wiki Xtensa instructions. I will comment further over there.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 05, 2022, 12:58:03 am
Using the updated instructions, I have made progress. Compiling ppcrossxtensa finished with no errors.

Now when I tried to compile the 'hello world' test program the first time, the linker complained that it could not find libc_fnano.a and libstdc++.a.

After removing the 'sysroot' directory (which does not exist) from the last compiler option:
Code: Pascal  [Select][+][-]
  1. -Fl~/esp/xtensa-lx106-elf/xtensa-lx106-elf/sysroot/lib/
The linker was able to find libstdc++.a, but still not libc_fnano.a.

libc_nano.a is in ~/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib but not libc_fnano.a, and I don't know where that comes from as I do not find any ESP8266 or FPC source file that refers to it.

The content of the link*.res file in the project build directory (with paths normalized to the instructions) is:
Code: Pascal  [Select][+][-]
  1. SEARCH_DIR("~/esp/xtensa-lx106-elf-libs/")
  2. SEARCH_DIR("~/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib/")
  3. SEARCH_DIR("~/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib/")
  4. SEARCH_DIR("~/fpc/source/rtl/units/xtensa-freertos/")
  5. SEARCH_DIR("~/fpc/source/compiler/")
  6. INPUT (
  7. hello.o
  8. ~/fpc/source/rtl/units/xtensa-freertos/system.o
  9. ~/fpc/source/rtl/units/xtensa-freertos/esp8266.o
  10. ~/fpc/source/rtl/units/xtensa-freertos/consoleio.o
  11. ~/fpc/source/rtl/units/xtensa-freertos/heapmgr.o
  12. )
  13. GROUP(
  14. ~/esp/xtensa-lx106-elf-libs/libesp8266.a
  15. ~/esp/xtensa-lx106-elf-libs/liblog.a
  16. libc_fnano.a
  17. ~/esp/xtensa-lx106-elf-libs/libnewlib.a
  18. ~/esp/xtensa-lx106-elf-libs/libheap.a
  19. ~/esp/xtensa-lx106-elf-libs/libvfs.a
  20. ~/esp/xtensa-lx106-elf-libs/libesp_common.a
  21. ~/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib/libcore.a
  22. ~/esp/xtensa-lx106-elf-libs/libfreertos.a
  23. ~/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib/libphy.a
  24. ~/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib/libnet80211.a
  25. ~/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib/libhal.a
  26. ~/esp/xtensa-lx106-elf-libs/libnvs_flash.a
  27. ~/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib/librtc.a
  28. ~/esp/xtensa-lx106-elf-libs/libspi_flash.a
  29. ~/esp/xtensa-lx106-elf-libs/libesp_ringbuf.a
  30. ~/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib/libgcc.a
  31. ~/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib/libpp.a
  32. ~/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib/libstdc++.a
  33. ~/esp/xtensa-lx106-elf-libs/libpthread.a
  34. )
  35. SECTIONS
  36. {
  37.   .data :
  38.   {
  39.     KEEP (*(.fpc .fpc.n_version .fpc.n_links))
  40.   }
  41. }
  42.  

Is the 'f' in libc_fnano.a perhaps a typo that crept in somewhere?
What can I do to help diagnose this issue?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 05, 2022, 07:43:19 am
Using the updated instructions, I have made progress. Compiling ppcrossxtensa finished with no errors.

Now when I tried to compile the 'hello world' test program the first time, the linker complained that it could not find libc_fnano.a and libstdc++.a.

After removing the 'sysroot' directory (which does not exist) from the last compiler option:
Code: Pascal  [Select][+][-]
  1. -Fl~/esp/xtensa-lx106-elf/xtensa-lx106-elf/sysroot/lib/
The linker was able to find libstdc++.a, but still not libc_fnano.a.

libc_nano.a is in ~/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib but not libc_fnano.a, and I don't know where that comes from as I do not find any ESP8266 or FPC source file that refers to it.

This is a dependency change from esp8266-rtos-sdk v3.3 to v3.4, perhaps due to the newer gcc toolchain.  I'm busy testing a patch so that the compiler can generate the correct library requirements based on the SDK version.

Edit: proposed fix (https://gitlab.com/freepascal.org/fpc/source/-/merge_requests/115)
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 05, 2022, 06:55:49 pm
This is a dependency change from esp8266-rtos-sdk v3.3 to v3.4, perhaps due to the newer gcc toolchain.  I'm busy testing a patch so that the compiler can generate the correct library requirements based on the SDK version.

Edit: proposed fix (https://gitlab.com/freepascal.org/fpc/source/-/merge_requests/115)

I looked at that merge request, and it said it had been merged. So, I re-cloned the repo and rebuilt ppcrossxtensa. Compilation of the hello test program failed again with the same linker error:
Code: Pascal  [Select][+][-]
  1. ~/esp/xtensa-lx106-elf/bin/xtensa-lx106-elf-ld: cannot find libc_fnano.a
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 05, 2022, 08:38:04 pm
Did you add the command line option -WP3.4?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 05, 2022, 09:25:05 pm
Did you add the command line option -WP3.4?

No, I did not. I didn't realize I needed to. Adding that option appears to have fixed the issue as it compiled and linked with no errors.
(BTW, are these cross-compiler options documented somewhere? All I can find is -Wp which defines "Minimum iOS deployment version" though I'm sure this is for plain-vanilla FPC.)

I proceeded to flash the device (a Devkit v0.9; 2M flash) with:
Code: Pascal  [Select][+][-]
  1. $IDF_PATH/components/esptool_py/esptool/esptool.py --chip esp8266 --port "/dev/ttyUSB1" --baud 921600 --before "default_reset" --after "hard_reset" write_flash -z --flash_mode "dio" --flash_freq "40m" --flash_size "2MB"   0x0 bootloader.bin 0x10000 hello.bin 0x8000 partitions_singleapp.bin

The result:
Code: Pascal  [Select][+][-]
  1. esptool.py v2.4.0
  2. Connecting.....
  3. Chip is ESP8266EX
  4. Features: WiFi
  5. MAC: [retracted]
  6. Uploading stub...
  7. Running stub...
  8. Stub running...
  9. Changing baud rate to 921600
  10. Changed.
  11. Configuring flash size...
  12.  
  13. A fatal error occurred: Invalid head of packet (0x01)
  14.  

Edit:
FYI, I copied partitions_singleapp.bin from ~/esp8266/hello_world/build/ and bootloader.bin from ~/esp8266/hello_world/build/bootloader/
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: MarkMLl on January 05, 2022, 09:56:22 pm
> A fatal error occurred: Invalid head of packet (0x01)

Noting that your directory names imply that you're running "a Linux": watch out for ModemManager. I've had enormous problems with this when trying to bring up an Android 'phone from cold: in principle there's a way of telling it to ignore a specific port but in practice I found that I had to prevent it from starting.

Apart from that... watching the thread with interest.

MarkMLl

Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 05, 2022, 10:37:11 pm
Did you add the command line option -WP3.4?

No, I did not. I didn't realize I needed to. Adding that option appears to have fixed the issue as it compiled and linked with no errors.
(BTW, are these cross-compiler options documented somewhere? All I can find is -Wp which defines "Minimum iOS deployment version" though I'm sure this is for plain-vanilla FPC.)

The -WP option is now also used for xtensa-freertos.  There is a note on the xtensa wiki page about this option, but it is not really prominent I guess. There is a merge request (https://gitlab.com/freepascal.org/fpc/source/-/merge_requests/118) to add this option to the command line help output for the xtensa cross compiler.

Quote
I proceeded to flash the device (a Devkit v0.9; 2M flash) with:
Code: Pascal  [Select][+][-]
  1. $IDF_PATH/components/esptool_py/esptool/esptool.py --chip esp8266 --port "/dev/ttyUSB1" --baud 921600 --before "default_reset" --after "hard_reset" write_flash -z --flash_mode "dio" --flash_freq "40m" --flash_size "2MB"   0x0 bootloader.bin 0x10000 hello.bin 0x8000 partitions_singleapp.bin

The result:
Code: Pascal  [Select][+][-]
  1. esptool.py v2.4.0
  2. Connecting.....
  3. Chip is ESP8266EX
  4. Features: WiFi
  5. MAC: [retracted]
  6. Uploading stub...
  7. Running stub...
  8. Stub running...
  9. Changing baud rate to 921600
  10. Changed.
  11. Configuring flash size...
  12.  
  13. A fatal error occurred: Invalid head of packet (0x01)
  14.  

Edit:
FYI, I copied partitions_singleapp.bin from ~/esp8266/hello_world/build/ and bootloader.bin from ~/esp8266/hello_world/build/bootloader/

Nothing seems obviously wrong with your flash command.  Did you manage to flash the SDK example to your board (make flash)?  If so, just copy the parameters from there.

You can also try a lower baud rate, such as 115200.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 05, 2022, 11:56:20 pm
watch out for ModemManager.

My very first thought upon reading that was to try a different USB cable. Tried that. Tried a different USB port, too. No luck.

So, then I set ModemManager policy (https://www.freedesktop.org/software/ModemManager/api/1.12.0/ch03s02.html) to STRICT and even stopped the service. Same error. :(

More to follow below.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 06, 2022, 12:15:49 am
Nothing seems obviously wrong with your flash command.  Did you manage to flash the SDK example to your board (make flash)?  If so, just copy the parameters from there.

Yes, the Espressif hello_world example built, flashed, and worked successfully.

By, "the parameters from there," I assume you mean the MENUCONFIG > Serial Flasher configuration params.

I lowered the baud rate to 115200, as you suggested, which also agrees with the Serial Flasher config. It then flashed to the device, but I am not so sure it did so correctly given the output of the monitor command (ie. idf_monitor.py) quoted further below.

Flash output:
Quote
esptool.py v2.4.0
Connecting....
Chip is ESP8266EX
Features: WiFi
MAC: e8:db:84:99:e5:64
Uploading stub...
Running stub...
Stub running...
Configuring flash size...
Flash params set to 0x0030
Compressed 10432 bytes to 7027...
Wrote 10432 bytes (7027 compressed) at 0x00000000 in 0.7 seconds (effective 128.0 kbit/s)...
Hash of data verified.
Compressed 154160 bytes to 99259...
Wrote 154160 bytes (99259 compressed) at 0x00010000 in 9.1 seconds (effective 134.8 kbit/s)...
Hash of data verified.
Compressed 3072 bytes to 83...
Wrote 3072 bytes (83 compressed) at 0x00008000 in 0.0 seconds (effective 1640.8 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...

I then also changed the flash mode to QIO (ie. --flash_mode "qio") to be in agreement with the Serial Flasher. The output from the flash operation and the monitor appears to be the same as with DIO flash mode:

Monitor output:
Quote
~/esp8266/projects> $IDF_PATH/tools/idf_monitor.py --baud 74880 --port /dev/ttyUSB1 hello.elf
--- idf_monitor on /dev/ttyUSB1 74880 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---

 ets Jan  8 2013,rst cause:2, boot mode:(3,6)

load 0x40100000, len 7040, room 16
tail 0
chksum 0x69
load 0x3ffe8408, len 24, room 8
tail 0
chksum 0xe0
load 0x3ffe8420, len 3324, room 8
tail 4
chksum 0xa3
csum 0xa3
I (40) boot: ESP-IDF v3.4-53-g83517ba1 2nd stage bootloader
I (41) boot: compile time 19:04:49
I (41) qio_mode: Enabling default flash chip QIO
I (49) boot: SPI Speed      : 40MHz
I (55) boot: SPI Mode       : QIO
I (61) boot: SPI Flash Size : 2MB
I (67) boot: Partition Table:
I (73) boot: ## Label            Usage          Type ST Offset   Length
I (84) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (96) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (107) boot:  2 factory          factory app      00 00 00010000 000f0000
I (119) boot: End of partition table
I (125) esp_image: segment 0: paddr=0x00010010 vaddr=0x40210010 size=0x1b288 (111240) map
0x40210010: _stext at ??:?

I (176) esp_image: segment 1: paddr=0x0002b2a0 vaddr=0x4022b298 size=0x05984 ( 22916) map
I (184) esp_image: segment 2: paddr=0x00030c2c vaddr=0x3ffe8000 size=0x0002c (    44) load
I (187) esp_image: segment 3: paddr=0x00030c60 vaddr=0x3ffe8030 size=0x00604 (  1540) load
I (201) esp_image: segment 4: paddr=0x0003126c vaddr=0x40100024 size=0x0007c (   124) load
I (215) esp_image: segment 5: paddr=0x000312f0 vaddr=0x401000a0 size=0x04714 ( 18196) load
I (234) boot: Loaded app from partition at offset 0x10000

This must be an antisocial device as it did not say, "Hello".
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 06, 2022, 07:19:26 am
Nothing seems obviously wrong with your flash command.  Did you manage to flash the SDK example to your board (make flash)?  If so, just copy the parameters from there.

Yes, the Espressif hello_world example built, flashed, and worked successfully.

By, "the parameters from there," I assume you mean the MENUCONFIG > Serial Flasher configuration params.

Yes, or alternatively check the esptool.py command generated when executing make flash inside the SDK example.  It is a useful troubleshooting exercise to verify that the SDK example works on the hardware.  This at least eliminates hardware and OS interference problems.

Quote
I lowered the baud rate to 115200, as you suggested, which also agrees with the Serial Flasher config. It then flashed to the device, but I am not so sure it did so correctly given the output of the monitor command (ie. idf_monitor.py) quoted further below.

Flash output:
Quote
esptool.py v2.4.0
Connecting....
Chip is ESP8266EX
Features: WiFi
MAC: e8:db:84:99:e5:64
Uploading stub...
Running stub...
Stub running...
Configuring flash size...
Flash params set to 0x0030
Compressed 10432 bytes to 7027...
Wrote 10432 bytes (7027 compressed) at 0x00000000 in 0.7 seconds (effective 128.0 kbit/s)...
Hash of data verified.
Compressed 154160 bytes to 99259...
Wrote 154160 bytes (99259 compressed) at 0x00010000 in 9.1 seconds (effective 134.8 kbit/s)...
Hash of data verified.
Compressed 3072 bytes to 83...
Wrote 3072 bytes (83 compressed) at 0x00008000 in 0.0 seconds (effective 1640.8 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...

Hash of data verified indicates successful upload.

Quote
I then also changed the flash mode to QIO (ie. --flash_mode "qio") to be in agreement with the Serial Flasher. The output from the flash operation and the monitor appears to be the same as with DIO flash mode:

Monitor output:
Quote
~/esp8266/projects> $IDF_PATH/tools/idf_monitor.py --baud 74880 --port /dev/ttyUSB1 hello.elf
--- idf_monitor on /dev/ttyUSB1 74880 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---

 ets Jan  8 2013,rst cause:2, boot mode:(3,6)

load 0x40100000, len 7040, room 16
tail 0
chksum 0x69
load 0x3ffe8408, len 24, room 8
tail 0
chksum 0xe0
load 0x3ffe8420, len 3324, room 8
tail 4
chksum 0xa3
csum 0xa3
I (40) boot: ESP-IDF v3.4-53-g83517ba1 2nd stage bootloader
I (41) boot: compile time 19:04:49
I (41) qio_mode: Enabling default flash chip QIO
I (49) boot: SPI Speed      : 40MHz
I (55) boot: SPI Mode       : QIO
I (61) boot: SPI Flash Size : 2MB
I (67) boot: Partition Table:
I (73) boot: ## Label            Usage          Type ST Offset   Length
I (84) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (96) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (107) boot:  2 factory          factory app      00 00 00010000 000f0000
I (119) boot: End of partition table
I (125) esp_image: segment 0: paddr=0x00010010 vaddr=0x40210010 size=0x1b288 (111240) map
0x40210010: _stext at ??:?

I (176) esp_image: segment 1: paddr=0x0002b2a0 vaddr=0x4022b298 size=0x05984 ( 22916) map
I (184) esp_image: segment 2: paddr=0x00030c2c vaddr=0x3ffe8000 size=0x0002c (    44) load
I (187) esp_image: segment 3: paddr=0x00030c60 vaddr=0x3ffe8030 size=0x00604 (  1540) load
I (201) esp_image: segment 4: paddr=0x0003126c vaddr=0x40100024 size=0x0007c (   124) load
I (215) esp_image: segment 5: paddr=0x000312f0 vaddr=0x401000a0 size=0x04714 ( 18196) load
I (234) boot: Loaded app from partition at offset 0x10000

This must be an antisocial device as it did not say, "Hello".

Try a different baud rate.  The bootloader uses a non-standard baud of 74880, but once booted the serial baud is probably 115200 (this is also a configuration setting in menuconfig).

Edit: fixed quoting
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 06, 2022, 07:40:00 pm
Try a different baud rate.  The bootloader uses a non-standard baud of 74880, but once booted the serial baud is probably 115200 (this is also a configuration setting in menuconfig).

I tried multiple different baud rates: 115200, 57600, 38400, 19200, 9600, 4800, 1200. Every rate but 74800 gives me garbage. The Espressif menuconfig is set to flash at 115200 and monitor at 74880.

To see if there were any differences between the Espressif hello_world example operation and my FPC Xtensa operation, I captured the output from flashing and monitoring both projects, respectively.

The flash output between the two is the same except for the size of the main app written to the device at 0x00010000 as expected.

In the monitor output, the boot mode [boot mode:(3,7) vs boot mode:(3,6)] and the esp_image differ.

I assume the differences in the esp_image are due to the difference in the main app. But, here they are anyway.

hello_world (hello_world_main.c):
Quote
I (250) esp_image: segment 0: paddr=0x00010010 vaddr=0x40210010 size=0x1cc70 (117872) map
0x40210010: _stext at ??:?

I (333) esp_image: segment 1: paddr=0x0002cc88 vaddr=0x4022cc80 size=0x0724c ( 29260) map
I (348) esp_image: segment 2: paddr=0x00033edc vaddr=0x3ffe8000 size=0x00544 (  1348) load
I (356) esp_image: segment 3: paddr=0x00034428 vaddr=0x40100000 size=0x00080 (   128) load
I (383) esp_image: segment 4: paddr=0x000344b0 vaddr=0x40100080 size=0x050c0 ( 20672) load

hello.pp:
Quote
I (127) esp_image: segment 0: paddr=0x00010010 vaddr=0x40210010 size=0x1b288 (111240) map
0x40210010: _stext at ??:?

I (178) esp_image: segment 1: paddr=0x0002b2a0 vaddr=0x4022b298 size=0x05984 ( 22916) map
I (186) esp_image: segment 2: paddr=0x00030c2c vaddr=0x3ffe8000 size=0x0002c (    44) load
I (189) esp_image: segment 3: paddr=0x00030c60 vaddr=0x3ffe8030 size=0x00604 (  1540) load
I (203) esp_image: segment 4: paddr=0x0003126c vaddr=0x40100024 size=0x0007c (   124) load
I (217) esp_image: segment 5: paddr=0x000312f0 vaddr=0x401000a0 size=0x04714 ( 18196) load

I don't know what else I can do.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 07, 2022, 08:16:08 am
Try a different baud rate.  The bootloader uses a non-standard baud of 74880, but once booted the serial baud is probably 115200 (this is also a configuration setting in menuconfig).

I tried multiple different baud rates: 115200, 57600, 38400, 19200, 9600, 4800, 1200. Every rate but 74800 gives me garbage. The Espressif menuconfig is set to flash at 115200 and monitor at 74880.

To see what the baud rate was for the SDK example, search for CONFIG_CONSOLE_UART_BAUDRATE in the file sdkconfig in the root of the SDK example project folder.  This is the baud rate which will be used for the normal program serial IO (except if the baud rate is programmatically changed, but then you should know what is going on  :)).

Quote
To see if there were any differences between the Espressif hello_world example operation and my FPC Xtensa operation, I captured the output from flashing and monitoring both projects, respectively.

The flash output between the two is the same except for the size of the main app written to the device at 0x00010000 as expected.

In the monitor output, the boot mode [boot mode:(3,7) vs boot mode:(3,6)] and the esp_image differ.

I assume the differences in the esp_image are due to the difference in the main app. But, here they are anyway.

hello_world (hello_world_main.c):
Quote
I (250) esp_image: segment 0: paddr=0x00010010 vaddr=0x40210010 size=0x1cc70 (117872) map
0x40210010: _stext at ??:?

I (333) esp_image: segment 1: paddr=0x0002cc88 vaddr=0x4022cc80 size=0x0724c ( 29260) map
I (348) esp_image: segment 2: paddr=0x00033edc vaddr=0x3ffe8000 size=0x00544 (  1348) load
I (356) esp_image: segment 3: paddr=0x00034428 vaddr=0x40100000 size=0x00080 (   128) load
I (383) esp_image: segment 4: paddr=0x000344b0 vaddr=0x40100080 size=0x050c0 ( 20672) load

hello.pp:
Quote
I (127) esp_image: segment 0: paddr=0x00010010 vaddr=0x40210010 size=0x1b288 (111240) map
0x40210010: _stext at ??:?

I (178) esp_image: segment 1: paddr=0x0002b2a0 vaddr=0x4022b298 size=0x05984 ( 22916) map
I (186) esp_image: segment 2: paddr=0x00030c2c vaddr=0x3ffe8000 size=0x0002c (    44) load
I (189) esp_image: segment 3: paddr=0x00030c60 vaddr=0x3ffe8030 size=0x00604 (  1540) load
I (203) esp_image: segment 4: paddr=0x0003126c vaddr=0x40100024 size=0x0007c (   124) load
I (217) esp_image: segment 5: paddr=0x000312f0 vaddr=0x401000a0 size=0x04714 ( 18196) load
Nothing out of the ordinary here.  The differences are both due to differences in main code (as you suspected) and the impact of the fpc RTL code.

Quote
I don't know what else I can do.

Try a slightly more busy version which keeps on pumping serial data:
Code: Pascal  [Select][+][-]
  1. program test;
  2.  
  3. // vTaskDelay is defined in libfreertos.a
  4. // libfreertos.a is linked in automatically as part of the RTL
  5. procedure vTaskDelay(xTicksToDelay: uint32); external;
  6.  
  7. begin
  8.   repeat
  9.     writeln('Hello');
  10.     vTaskDelay(100); // the default tick duration is 10 ms, so this should delay for 1 s. This also keeps the watchdog happy.
  11.   until false;
  12. end.

You can also download a prebuilt SDK snapshot (that I tested) here: https://github.com/ccrause/fpc-esp-freertos/blob/master/snapshot/fpc-esp8266-idf-3.4-20220107.zip
This snapshot is configured for a baud rate of 115200, so you should see the output of the above test program with a serial monitor configured for 115200 baud.  The 1st stage bootloader output is fixed at 74880 baud (or rather depends on the base clock frequency of the module), so the first bit of output will be scrambled, until the 2nd stage bootloader is loaded.  Modify the library path to point to the libs folder inside this snapshot (after extracting the contents).  This is just to test against my configuration, else we are not looking at the same libraries and we will keep on guessing what the other configuration looks like...
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 08, 2022, 11:13:27 pm
You can also download a prebuilt SDK snapshot (that I tested) here: https://github.com/ccrause/fpc-esp-freertos/blob/master/snapshot/fpc-esp8266-idf-3.4-20220107.zip
This snapshot is configured for a baud rate of 115200, so you should see the output of the above test program with a serial monitor configured for 115200 baud.  The 1st stage bootloader output is fixed at 74880 baud (or rather depends on the base clock frequency of the module), so the first bit of output will be scrambled, until the 2nd stage bootloader is loaded.  Modify the library path to point to the libs folder inside this snapshot (after extracting the contents).  This is just to test against my configuration, else we are not looking at the same libraries and we will keep on guessing what the other configuration looks like...

Okay, so I copied the bootloader and partition images from your snapshot to my test project directory and built the "busy" test program with (paths normalized to aid clarity):
Quote
~/esp/fpc/source/compiler/ppcrossxtensa -Fu~/esp/fpc/source/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -O3 -Wpesp8266 -WP3.4 test -Fl~/esp/fpc-esp8266-idf-3.4/libs -Fl~/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib/

The result appears to be the same (ie. no "Hello"):
Quote
[garbage] (49) boot: ESP-IDF v3.4-43-ge9516e4c 2nd stage bootloader
I (49) boot: compile time 17:07:40
I (49) boot: SPI Speed      : 40MHz
I (53) boot: SPI Mode       : DIO
I (57) boot: SPI Flash Size : 2MB
I (61) boot: Partition Table:
I (64) boot: ## Label            Usage          Type ST Offset   Length
I (72) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (79) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (87) boot:  2 factory          factory app      00 00 00010000 000f0000
I (94) boot: End of partition table
I (98) esp_image: segment 0: paddr=0x00010010 vaddr=0x40210010 size=0x1b3b8 (111544) map
0x40210010: _stext at ??:?

I (154) esp_image: segment 1: paddr=0x0002b3d0 vaddr=0x4022b3c8 size=0x05910 ( 22800) map
I (164) esp_image: segment 2: paddr=0x00030ce8 vaddr=0x3ffe8000 size=0x0002c (    44) load
I (164) esp_image: segment 3: paddr=0x00030d1c vaddr=0x3ffe8030 size=0x00614 (  1556) load
I (171) esp_image: segment 4: paddr=0x00031338 vaddr=0x40100024 size=0x0007c (   124) load
I (180) esp_image: segment 5: paddr=0x000313bc vaddr=0x401000a0 size=0x04740 ( 18240) load
I (196) boot: Loaded app from partition at offset 0x10000


Perhaps I did not follow your instructions correctly.

I tried rebuilding the SDK 'hello world' example using your sdkconfig (running Menuconfig only to change the usb path) and using the generated linker and image files. That did not produce success either.

The bootloader images between various builds differ. I suspect that is due to the differing sdkconfig settings (ie. baud rates, etc.).

At this point I have tried so many different things (including recompiling ppcrossxtensa) I am becoming lost in the various changes. I think I need to wipe everything and restart from scratch. But, that won't happen right away as I have other projects in need of attention.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 09, 2022, 01:13:53 pm
Alternatively try a simple blink, just to move away from baud rate issues and so forth.  Below an example which blinks an LED connected to GPIO2 (also used for TX1). On my NodeMCU devkit 1 board, this is connected to pin D4, in case your board doesn't have an installed LED on this output.  Of course if you have a different setup, change the LED constant below, or simply measure the pin voltage to confirm it is cycling high/low.
Code: Pascal  [Select][+][-]
  1. program blink;
  2.  
  3. type
  4.   Tgpio_config = record
  5.     pin_bit_mask: uint32;  // Pin mask of pins to configure
  6.     mode: integer;         // 0 = disabled, 1 = input, 2 = output, 6 = output open drain
  7.     pull_up_en: integer;   // 0 = disabled, 1 = enabled
  8.     pull_down_en: integer; // 0 = disabled, 1 = enabled
  9.     intr_type: integer;    // 0 = disabled, 1 = positive edge, 2 = negative edge, 3 = any edge, 4 = low level, 5 = high level
  10.   end;
  11.  
  12. const
  13.   // GPIO pin number for pin connected to LED
  14.   LED = 2;  // NodeMCU LED on ESP-12E module
  15.  
  16. // Return value is error code, 0 = success
  17. function gpio_config(constref gpio_cfg: Tgpio_config): integer; external;
  18.  
  19. // mode: GPIO_MODE_DISABLE = 0, GPIO_MODE_INPUT = 1, GPIO_MODE_OUTPUT = 2, GPIO_MODE_OUTPUT_OD = 6
  20. function gpio_set_direction(gpio_num: integer; mode: integer): integer; external;
  21.  
  22. // level: Low = 0, High = 1
  23. function gpio_set_level(gpio_num: integer; level: uint32): integer; external;
  24.  
  25. procedure vTaskDelay(xTicksToDelay: uint32); external;
  26.  
  27. var
  28.   cfg: Tgpio_config;
  29.  
  30. begin
  31.   cfg.pin_bit_mask := 1 shl ord(LED);
  32.   cfg.mode := 1;
  33.   cfg.pull_up_en := 0;
  34.   cfg.pull_down_en := 0;
  35.   cfg.intr_type := 0;
  36.   gpio_config(cfg);
  37.  
  38.   gpio_set_direction(LED, 2);
  39.   repeat
  40.     writeln('.');
  41.     gpio_set_level(LED, 0);
  42.     vTaskDelay(100);
  43.     writeln('*');
  44.     gpio_set_level(LED, 1);
  45.     vTaskDelay(100);
  46.   until false;
  47. end.
  48.  

For my setup, I compile as follows:
Code: [Select]
~/fpc/gitlab-cc/compiler/ppcrossxtensa -n @~/fpc/gitlab-cc/fpc.cfg -Tfreertos -Wpesp8266 -WP3.4 -Fl/home/christo/xtensa/examples/hello_world-esp8266/libs -Fl~/xtensa/xtensa-lx106-elf/xtensa-lx106-elf/lib -FD/home/christo/xtensa/xtensa-lx106-elf/bin -Ff/home/christo/xtensa/ESP8266_RTOS_SDK_v3.4 blink.pp
Free Pascal Compiler version 3.3.1 [2022/01/06] for xtensa
Copyright (c) 1993-2021 by Florian Klaempfl and others
Target OS: FreeRTOS
Compiling blink.pp
Assembling blink
Linking blink
esptool.py v2.4.0
69 lines compiled, 7.0 sec, 114206 bytes code, 44 bytes data

For reference, find the generated binary attached.
Flash blink.bin to controller:
Code: [Select]
~/xtensa/ESP8266_RTOS_SDK_v3.4/components/esptool_py/esptool/esptool.py -c auto -p /dev/ttyUSB0 --baud 500000 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x10000 blink.bin
esptool.py v2.4.0
Connecting....
Detecting chip type... ESP8266
Chip is ESP8266EX
Features: WiFi
MAC: 84:f3:eb:76:de:3a
Uploading stub...
Running stub...
Stub running...
Changing baud rate to 500000
Changed.
Configuring flash size...
Auto-detected Flash size: 4MB
Compressed 157424 bytes to 101105...
Wrote 157424 bytes (101105 compressed) at 0x00010000 in 2.2 seconds (effective 570.0 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...

Edit: Note that I have previously flashed the bootloader and partition images for this SDK version, so this time round I only needed to flash the application.

Edit2: I forgot about the writeln statements!  The blinking LED is hopefully present to confirm successful upload.  Additionally one can check the serial output @ 115200 baud:
Code: Text  [Select][+][-]
  1. $<0x9c><0x9f>|<break>
  2. <0x84>l<0xe0><<0x03><0x0c><0x04><0x04><0x8c><0x04>l<0xe4><0x04>c|<0x8f><0xc3><0x03><0xe4><0x13><0x9b>;<0x93>c<0x8c><0x04>c<0x84><0xfb>gn<0x9f>dog<0x9c><0xe3><0xe4><0x04>c<0x1c>8<0x84><0x87>lrd;lx<0xf3>o<0xe0><0x18><0x03><0x0c><0x04><0xc3><0x0c>d<0x0c><0x04><0x04><0x0c><0x04><0x0c>#<0x04>g<0xe3>|<0x02><0xe4><0x87>p<0xd8><0x04><0x0c>#<0x8c><0xf3>ng<0xef><break>
  3. l<0x8c><0x8f>l <0x03><0x98><0x13><0x1b>g'l<0x8c>$`<0x03><0x0f><0x03>g{<0x8f><0x92><0x9b>o<0x0c><0x04><0x12><0xe3><0xdb> <0x03>`<0xf2>n<0x0c><0x04><0x04><0x9f><0xe0>c<0xc3>'$<0x8c><0x04><0x8c><0xf3>og<0xe7><break>
  4. <0x0c><0xc7><0x07>l8<0xfb>o<0xe0><0x10><0x03><0x0c><0x04>;<0x84><0x9c><0xdc><0xe3><0xe0><0x0c><0x8e><0x04><0x0c>b<0x0c>'<0xe3>|<0x03><0x84><0x0c><0x8e>c<0x8c><0xfb>o'<0xe7><break>
  5. l<0x84><0x0c>d`<0x02><0xd8><0x1b><0x12>'ol<0x84>l <0x03><0x07><0x03>n;<0x87><0x93><0xdb>g<0x04><0x0c>c<0xc4><0xc7><0x07>l`<0xf3>o<0x0c><0x04><0x0c><0x9e><0xe0>c<0x83>nl<0x84><0x0c><0x8c><0xfb>g'<0xe7><break>
  6. <0x0c><0x8f><0x0e>dp<0xfb>g<0xe0><0x10><0x02><0x04><0x0c>s<0xc4><0x9c><0x9c><0xe3><0xe0><0x0c><0x8f><0x1c><0x80><0x04>c<0x0c>o<0xe2>|<0x03><0xec><0xec><0xc4><0x0c><0x8e>c<0x8c><0xfb>g'<0xe7><break>
  7. l<0xc4><0x0c>d`<0x02><0x98><0x13><0x1b>g'<0x0c>l`<0x03><0x07><0x03>or<0xc7><0x9b><0x92>'<0x0c><0x0c><0x9b>l<0x9b>`<0x02><0x07>{<0x92><0x9b>o<0x0c><0x04><0x92>d<0xdb>`<0xa1><0xa3>+<0xda><0x9a><0x92>j%<0x81>(49) boot: ESP-IDF v3.4-43-ge9516e4c 2nd stage bootloader<0x1b>[0m
  8. <0x1b>[0;32mI (49) boot: compile time 13:24:36<0x1b>[0m
  9. <0x1b>[0;32mI (49) boot: SPI Speed      : 40MHz<0x1b>[0m
  10. <0x1b>[0;32mI (53) boot: SPI Mode       : DIO<0x1b>[0m
  11. <0x1b>[0;32mI (57) boot: SPI Flash Size : 2MB<0x1b>[0m
  12. <0x1b>[0;32mI (61) boot: Partition Table:<0x1b>[0m
  13. <0x1b>[0;32mI (64) boot: ## Label            Usage          Type ST Offset   Length<0x1b>[0m
  14. <0x1b>[0;32mI (72) boot:  0 nvs              WiFi data        01 02 00009000 00006000<0x1b>[0m
  15. <0x1b>[0;32mI (79) boot:  1 phy_init         RF data          01 01 0000f000 00001000<0x1b>[0m
  16. <0x1b>[0;32mI (87) boot:  2 factory          factory app      00 00 00010000 000f0000<0x1b>[0m
  17. <0x1b>[0;32mI (94) boot: End of partition table<0x1b>[0m
  18. <0x1b>[0;32mI (98) esp_image: segment 0: paddr=0x00010010 vaddr=0x40210010 size=0x1be20 (114208) map<0x1b>[0m
  19. <0x1b>[0;32mI (155) esp_image: segment 1: paddr=0x0002be38 vaddr=0x4022be30 size=0x05a6c ( 23148) map<0x1b>[0m
  20. <0x1b>[0;32mI (165) esp_image: segment 2: paddr=0x000318ac vaddr=0x3ffe8000 size=0x0002c (    44) load<0x1b>[0m
  21. <0x1b>[0;32mI (166) esp_image: segment 3: paddr=0x000318e0 vaddr=0x3ffe8030 size=0x00614 (  1556) load<0x1b>[0m
  22. <0x1b>[0;32mI (173) esp_image: segment 4: paddr=0x00031efc vaddr=0x40100000 size=0x00080 (   128) load<0x1b>[0m
  23. <0x1b>[0;32mI (182) esp_image: segment 5: paddr=0x00031f84 vaddr=0x40100080 size=0x04740 ( 18240) load<0x1b>[0m
  24. <0x1b>[0;32mI (198) boot: Loaded app from partition at offset 0x10000<0x1b>[0m
  25. <0x1b>[0;32mI (220) gpio: GPIO[2]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 <0x1b>[0m
  26. .
  27. *
  28. .
  29. *
  30. .
  31. *
A * should be output when the pin is high and . when the pin is low.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 09, 2022, 08:12:04 pm
For my setup, I compile as follows:
Code: [Select]
~/fpc/gitlab-cc/compiler/ppcrossxtensa -n @~/fpc/gitlab-cc/fpc.cfg -Tfreertos -Wpesp8266 -WP3.4 -Fl/home/christo/xtensa/examples/hello_world-esp8266/libs -Fl~/xtensa/xtensa-lx106-elf/xtensa-lx106-elf/lib -FD/home/christo/xtensa/xtensa-lx106-elf/bin -Ff/home/christo/xtensa/ESP8266_RTOS_SDK_v3.4 blink.pp
Free Pascal Compiler version 3.3.1 [2022/01/06] for xtensa
Copyright (c) 1993-2021 by Florian Klaempfl and others
Target OS: FreeRTOS
Compiling blink.pp
Assembling blink
Linking blink
esptool.py v2.4.0
69 lines compiled, 7.0 sec, 114206 bytes code, 44 bytes data

Why are 69 lines compiled when there are only 47 in your Blink program?

Your compiler options are quite a bit different than that shown in the instructions on the Wiki. Incorporating some of your command-line options, this is what I get:
Code: [Select]
~/eDevel/Embedded/fpc/source/compiler/ppcrossxtensa -Fu~/eDevel/Embedded/fpc/source/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -O3 -Wpesp8266 -WP3.4 -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf-libs -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib -Fl~/eDevel/Embedded/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib -FD~/eDevel/Embedded/esp/xtensa-lx106-elf/bin -Ff$HOME/eDevel/Embedded/esp8266/ESP8266_RTOS_SDK blink
Free Pascal Compiler version 3.3.1 [2022/01/05] for xtensa
Copyright (c) 1993-2021 by Florian Klaempfl and others
Target OS: FreeRTOS
Compiling blink.pas
Assembling blink
Linking blink
esptool.py v2.4.0
47 lines compiled, 2.0 sec, 114134 bytes code, 44 bytes data
(Note: I have to use $HOME for the framework option since it does not seem to recognize '~'.)

Quote from: ccrause
For reference, find the generated binary attached.

My blink.bin is 48 bytes larger than yours.
Code: [Select]
Wrote 157472 bytes (101018 compressed) at 0x00010000 in 9.2 seconds (effective 136.6 kbit/s)...
And, along the same vein of success I've been having, it didn't work; no "hello", no flash, just the usual notice of "Loaded app from partition at offset 0x10000" and nothing after.

However...

I flashed your blink.bin ... and it worked!

For reference, find my generated blink.bin attached.

Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: af0815 on January 09, 2022, 08:39:30 pm
Thanks for the blink sample. I am now able to run this sample with a windows system for cross compiling. The input from this thread was good for me.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 09, 2022, 09:38:16 pm
Why are 69 lines compiled when there are only 47 in your Blink program?
Well spotted! My original code contained a bunch of extra comments which I removed after pasting it to improve clarity of the code.

Quote
Your compiler options are quite a bit different than that shown in the instructions on the Wiki.

I use several different folder structures for testing, hence the paths in my example will not necessarily match the wiki convention.  I have now added -WP3.4
to the wiki compile command line, since this option is becoming more important as more SDK versions are released.

Quote
Incorporating some of your command-line options, this is what I get:
Code: [Select]
~/eDevel/Embedded/fpc/source/compiler/ppcrossxtensa -Fu~/eDevel/Embedded/fpc/source/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -O3 -Wpesp8266 -WP3.4 -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf-libs -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib -Fl~/eDevel/Embedded/esp8266/ESP8266_RTOS_SDK/components/esp8266/lib -FD~/eDevel/Embedded/esp/xtensa-lx106-elf/bin -Ff$HOME/eDevel/Embedded/esp8266/ESP8266_RTOS_SDK blink
Free Pascal Compiler version 3.3.1 [2022/01/05] for xtensa
Copyright (c) 1993-2021 by Florian Klaempfl and others
Target OS: FreeRTOS
Compiling blink.pas
Assembling blink
Linking blink
esptool.py v2.4.0
47 lines compiled, 2.0 sec, 114134 bytes code, 44 bytes data
(Note: I have to use $HOME for the framework option since it does not seem to recognize '~'.)

I have also noticed the same - for some options the home folder shortcut on Linux is expanded, other options seem to use it literally.

Quote
My blink.bin is 48 bytes larger than yours.
Code: [Select]
Wrote 157472 bytes (101018 compressed) at 0x00010000 in 9.2 seconds (effective 136.6 kbit/s)...

There are a couple of things that can cause a difference in compiled size:

Quote
And, along the same vein of success I've been having, it didn't work; no "hello", no flash, just the usual notice of "Loaded app from partition at offset 0x10000" and nothing after.

However...

I flashed your blink.bin ... and it worked!

For reference, find my generated blink.bin attached.

Hmm, lets not give up just yet, there must be a way  to figure this out. Could you perhaps compile the blink example with debugging information (dwarf 3, or -gw3), optimization level 1 (-O1) and attach or share the generated .elf file.  If using Lazarus remember to unselect the Display line numbers in run-time error backtraces -gl option.  When I have time I can poke around to try and figure out what is going on.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 09, 2022, 11:21:39 pm
Could you perhaps compile the blink example with debugging information (dwarf 3, or -gw3), optimization level 1 (-O1) and attach or share the generated .elf file.
(Just FYI: Using Kate, not Lazarus.)

The ELF file is too big to attach, so find it here:
https://www.dropbox.com/s/9w5zp4zbxu5m7fw/blink.elf.zip?dl=1 (https://www.dropbox.com/s/9w5zp4zbxu5m7fw/blink.elf.zip?dl=1)
(If there is an issue with the direct download, change dl=1 to dl=0)

Built with:
Code: [Select]
~/eDevel/Embedded/fpc/source/compiler/ppcrossxtensa -Fu~/eDevel/Embedded/fpc/source/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -gw3 -O1 -Wpesp8266 -WP3.4 -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf-libs -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib -Fl$IDF_PATH/components/esp8266/lib blink(IDF_PATH=$HOME/eDevel/Embedded/esp8266/ESP8266_RTOS_SDK)
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 13, 2022, 02:26:46 am
While re-reading the instructions (https://wiki.freepascal.org/Xtensa), I see the following line which I must have glossed over before thinking I had read that a version of FPC greater than 3 was required (which I probably read somewhere else).
Quote
A native FPC development branch ("main" in git; formerly "trunk" in svn) must be installed and working on the system and will be used to compile the xtensa cross compiler.

Is using a development branch version to compile ppcrossxtensa absolutely necessary? If so, how would I accomplish that?

Using fpcupdeluxe, I installed a "trunk" version of FPC into ~/fpcupdeluxe, but it did not add any path for that. Undoubtedly, the 'make' command as is would use /usr/bin/fpc which is v3.2.0. So I took a guess and recompiled ppcrossxtensa with:
Code: [Select]
make FPC=~/fpcupdeluxe/fpc/bin/x86_64-linux/fpc CPU_TARGET=xtensa OS_TARGET=freertos SUBARCH=lx106 BINUTILSPREFIX=xtensa-lx106-elf- all -j
Is the Makefile smart enough to use the newly installed trunk version's units, or would it use the units from my 3.2.0 version in /usr/lib64/fpc/3.2.0/?

ppcrossxtensa appears to be the trunk version:
Code: [Select]
~/eDevel/Embedded/esp/8266/fpc/compiler/ppcrossxtensa -Fu~/eDevel/Embedded/esp/8266/fpc/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -O3 -Wpesp8266 -WP3.4 -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf-libs -Fl$IDF_PATH/components/esp8266/lib -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib blink
Free Pascal Compiler version 3.3.1 [2022/01/09] for xtensa
Copyright (c) 1993-2021 by Florian Klaempfl and others
Target OS: FreeRTOS
Compiling blink.pas
Assembling blink
Linking blink
esptool.py v2.4.0
47 lines compiled, 2.8 sec, 114134 bytes code, 44 bytes data

But, I don't know if the ppcrossxtensa might be a mish-mash of v3.3.1 and v3.2.0.

At any rate, rebuilding and re-flashing blink.bin did not provide success.


Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 13, 2022, 06:08:30 am
While re-reading the instructions (https://wiki.freepascal.org/Xtensa), I see the following line which I must have glossed over before thinking I had read that a version of FPC greater than 3 was required (which I probably read somewhere else).
Quote
A native FPC development branch ("main" in git; formerly "trunk" in svn) must be installed and working on the system and will be used to compile the xtensa cross compiler.

Is using a development branch version to compile ppcrossxtensa absolutely necessary? If so, how would I accomplish that?

Xtensa support is only available in the development branch (main).  It probably would be included in fpc 3.4, but that is still a long way away.

Quote
Using fpcupdeluxe, I installed a "trunk" version of FPC into ~/fpcupdeluxe, but it did not add any path for that. Undoubtedly, the 'make' command as is would use /usr/bin/fpc which is v3.2.0. So I took a guess and recompiled ppcrossxtensa with:
Code: [Select]
make FPC=~/fpcupdeluxe/fpc/bin/x86_64-linux/fpc CPU_TARGET=xtensa OS_TARGET=freertos SUBARCH=lx106 BINUTILSPREFIX=xtensa-lx106-elf- all -j
Is the Makefile smart enough to use the newly installed trunk version's units, or would it use the units from my 3.2.0 version in /usr/lib64/fpc/3.2.0/?

The MakeFile used by FPC is designed to work inside the folder structure of FPC source. If you start make from the root of the trunk source folder, it will start by building a native compiler using the starting stable compiler, then use the trunk native compiler to compile the cross compiler.

The starting compiler make will use can be specified with the FPC variable.  In your example above it will use the fpcupdeluxe version of FPC, not the one installed in /user.  Also, fpcupdeluxe provides its own fpc.cfg that points to the appropriate compiled units.

Quote
ppcrossxtensa appears to be the trunk version:
Code: [Select]
~/eDevel/Embedded/esp/8266/fpc/compiler/ppcrossxtensa -Fu~/eDevel/Embedded/esp/8266/fpc/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -O3 -Wpesp8266 -WP3.4 -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf-libs -Fl$IDF_PATH/components/esp8266/lib -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib blink
Free Pascal Compiler version 3.3.1 [2022/01/09] for xtensa
Copyright (c) 1993-2021 by Florian Klaempfl and others
Target OS: FreeRTOS
Compiling blink.pas
Assembling blink
Linking blink
esptool.py v2.4.0
47 lines compiled, 2.8 sec, 114134 bytes code, 44 bytes data

But, I don't know if the ppcrossxtensa might be a mish-mash of v3.3.1 and v3.2.0.

Nope, FPC checks compiled unit versions and would complain if it encounters a unit that was compiled with a different compiler version.

Quote
At any rate, rebuilding and re-flashing blink.bin did not provide success.

I'm starting to suspect your problem is not really a compiler problem, but perhaps something odd with the SDK libraries you are using.  I have tested your compiled blink, it doesn't appear to reach the main entry point of the FPC program.  Will try to perform some debugging, but that is very flaky on the esp8266...
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: af0815 on January 13, 2022, 09:01:17 am
I have switch to the correct branch (3.4) in the development git of expressif, before i get this working in windows. After this i build the sample new and use this new generated libs and bins. After this, i could build a working sample with fpc (on windows), working on the esp8266. And i have used the newest cross-tools from expressif.

With the master branch of the git from expressif, it was not working. This was my fist mistake.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 13, 2022, 09:05:34 pm
Could you perhaps compile the blink example with debugging information (dwarf 3, or -gw3), optimization level 1 (-O1) and attach or share the generated .elf file.
(Just FYI: Using Kate, not Lazarus.)

The ELF file is too big to attach, so find it here:
https://www.dropbox.com/s/9w5zp4zbxu5m7fw/blink.elf.zip?dl=1 (https://www.dropbox.com/s/9w5zp4zbxu5m7fw/blink.elf.zip?dl=1)
(If there is an issue with the direct download, change dl=1 to dl=0)

I used OpenOCD (https://github.com/sysprogs/esp8266-openocd) to debug your blink running on an esp8266.  It was clear that the boot process got stuck in an exception after loading the application from flash, but before reaching the Pascal main.  Stepping through the startup code proceeded until it tries to execute the privileged RSIL instruction, which raises an exception.  Execution appears to be stuck inside the exception handler after this:
Code: Text  [Select][+][-]
  1. Temporary breakpoint 9, call_start_cpu (start_addr=<optimized out>) at /home/user/eDevel/Embedded/esp8266/ESP8266_RTOS_SDK/components/esp8266/source/startup.c:154
  2. 154     in /home/user/eDevel/Embedded/esp8266/ESP8266_RTOS_SDK/components/esp8266/source/startup.c
  3. => 0x40213b3d <call_start_cpu+169>:     20 62 00        rsil    a2, 2
  4.    0x40213b40 <call_start_cpu+172>:     11 8a f1        l32r    a1, 0x40210168 <_stext+344>
  5. (gdb) si
  6. xtensa_step: Timed out waiting for target to finish stepping.
  7.  
  8. Program stopped.
  9. 0x40100070 in _KernelExceptionVector ()
  10. => 0x40100070 <_KernelExceptionVector+28>:      00 00 00        ill
  11. (gdb)

Since the executions does not reach FPC code, the problem is most probably in the bootloader code linked in from the SDK libraries.  My guess is that the startup code does not properly initialize the CPU state.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 14, 2022, 07:45:00 pm
While re-reading the instructions (https://wiki.freepascal.org/Xtensa), I see the following line which I must have glossed over before thinking I had read that a version of FPC greater than 3 was required (which I probably read somewhere else).
Quote
A native FPC development branch ("main" in git; formerly "trunk" in svn) must be installed and working on the system and will be used to compile the xtensa cross compiler.

Is using a development branch version to compile ppcrossxtensa absolutely necessary? If so, how would I accomplish that?

Xtensa support is only available in the development branch (main).  It probably would be included in fpc 3.4, but that is still a long way away.

Yes, I understand that. That is not what I was asking.

That particular sentence could be read to mean that a working compiler from the development branch must be installed and working prior to following the instructions on the page. It is not clear that will be accomplished through following the instructions. But, what you stated later on in your reply ("If you start make from the root of the trunk source folder, it will start by building a native compiler using the starting stable compiler, then use the trunk native compiler to compile the cross compiler.") clarified that and answered my questions. I did not need to use fpcupdeluxe to install a trunk version of FPC and use that to follow along.


Quote
I'm starting to suspect your problem is not really a compiler problem, but perhaps something odd with the SDK libraries you are using.  I have tested your compiled blink, it doesn't appear to reach the main entry point of the FPC program.  Will try to perform some debugging, but that is very flaky on the esp8266...

I've set up the toolchain and SDK for the ESP32 also and tried with that. The 'hello world' example works, but the FPC 'hello' program does not. It seems unlikely there would be odd issues with both SDKs. But, I don't discount that possibility.

So, I re-installed the 8266 toolchain and SDK making sure to specify the SDK v3.4 branch as Andreas noted. After recompiling and flashing 'hello' and 'blink'; still no joy.


I used OpenOCD (https://github.com/sysprogs/esp8266-openocd) to debug your blink running on an esp8266.  It was clear that the boot process got stuck in an exception after loading the application from flash, but before reaching the Pascal main.
[snip]

Since the executions does not reach FPC code, the problem is most probably in the bootloader code linked in from the SDK libraries.  My guess is that the startup code does not properly initialize the CPU state.

Thank you for taking the time to do that.

There are a couple things I do not understand about this:
1. Why does the 'hello world' example work but a FPC program does not with the very same bootloader?
2. Since I did not share my bootloader image, you must have used your own. So, wouldn't that mean the issue is also present in yours as well? Or, am I missing something?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 14, 2022, 10:39:14 pm
I've set up the toolchain and SDK for the ESP32 also and tried with that. The 'hello world' example works, but the FPC 'hello' program does not. It seems unlikely there would be odd issues with both SDKs. But, I don't discount that possibility.

I agree, seems very unlikely...

Quote
So, I re-installed the 8266 toolchain and SDK making sure to specify the SDK v3.4 branch as Andreas noted. After recompiling and flashing 'hello' and 'blink'; still no joy.
That sucks, but must be fixable somehow...

Quote
I used OpenOCD (https://github.com/sysprogs/esp8266-openocd) to debug your blink running on an esp8266.  It was clear that the boot process got stuck in an exception after loading the application from flash, but before reaching the Pascal main.
[snip]

Since the executions does not reach FPC code, the problem is most probably in the bootloader code linked in from the SDK libraries.  My guess is that the startup code does not properly initialize the CPU state.

Thank you for taking the time to do that.

There are a couple things I do not understand about this:
1. Why does the 'hello world' example work but a FPC program does not with the very same bootloader?
2. Since I did not share my bootloader image, you must have used your own. So, wouldn't that mean the issue is also present in yours as well? Or, am I missing something?
My reference to the bootloader code is not quite accurate.  The problem occurs after the bootloader jumps into the application image, so it is the startup code of the application that generates the exception, not the bootloader itself.

If you can zip and share the SDK library folder with the .a, .ld and sdkconfig files you used to link your fpc example, I can compare that against my copies. Also relink an example against your libraries to see if the issue is repeatable on a different machine.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 14, 2022, 11:29:32 pm
If you can zip and share the SDK library folder with the .a, .ld and sdkconfig files you used to link your fpc example, I can compare that against my copies. Also relink an example against your libraries to see if the issue is repeatable on a different machine.

I am unsure what exactly you mean by, "SDK library folder." I would think you mean the 'xtensa-lx106-elf-libs' folder that I created according to the instructions, but that has no 'sdkconfig' file. I can certainly copy sdkconfig to that dir before I zip it.

Regarding relinking an example, would you like the .bin, .o, and .elf (w/ or without debug info?) files? And, shall I do hello.pas since it is simpler?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 15, 2022, 08:00:05 am
If you can zip and share the SDK library folder with the .a, .ld and sdkconfig files you used to link your fpc example, I can compare that against my copies. Also relink an example against your libraries to see if the issue is repeatable on a different machine.

I am unsure what exactly you mean by, "SDK library folder." I would think you mean the 'xtensa-lx106-elf-libs' folder that I created according to the instructions, but that has no 'sdkconfig' file. I can certainly copy sdkconfig to that dir before I zip it.

Regarding relinking an example, would you like the .bin, .o, and .elf (w/ or without debug info?) files? And, shall I do hello.pas since it is simpler?

Yes, I meant 'xtensa-lx106-elf-libs' folder.  The sdkconfig file is in the root of the SDK example, produced during the Preparations step of the wiki instructions. It is not required for linking, but shows all the options configured when the "hello world" example was build.

I was thinking of just compiling my own FPC example, but for completeness you can also add your FPC hello.pp and compiled hello.o and hello.elf files.  Set debug info to Dwarf3, this helps when disassembling.  Note that adding debug info only affects the produced .elf size - the debug info is not carried over to the .bin image that is flashed to the controller.

Another test is if you download the SDK files I use: https://github.com/ccrause/fpc-esp-freertos/blob/master/snapshot/fpc-esp8266-idf-3.4-20220107.zip
Extract this zip file for example to "~/eDevel/Embedded/esp/fpc-esp8266-idf-3.4" and recompile your FPC example:
Code: Text  [Select][+][-]
  1. ~/eDevel/Embedded/esp/8266/fpc/compiler/ppcrossxtensa -Fu~/eDevel/Embedded/esp/8266/fpc/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -O3 -Wpesp8266 -WP3.4 -Fl~/eDevel/Embedded/fpc-esp8266-idf-3.4/libs -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib blink -gw3 -Ff~/eDevel/Embedded/fpc-esp8266-idf-3.4 blink

Checking compiler and tools versions. Mine:
Code: [Select]
~/fpc/gitlab-cc/compiler/ppcrossxtensa -iWD
3.3.1 2022/01/10

~/xtensa/xtensa-lx106-elf/bin/xtensa-lx106-elf-ld -v
GNU ld (crosstool-NG esp-2020r3-49-gd5524c1) 2.31.1

Hopefully after this it will be clear where the problem is, or at least produce a working example on your side.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 15, 2022, 09:09:07 pm
Okay. The following is what is included in the Zip file (https://www.dropbox.com/s/1icpsucsc19z8uh/esp.zip?dl=1).

- My 'xtensa-lx106-elf-libs' folder including sdkconfig copied from the hello_world example
- A 'hello' project folder built with Espressif's SDK (including, FWIW, the bootloader and partition images)
- A 'hello2' project folder built with your SDK (which, unfortunately, hangs at the very same spot after loading the app image)

Since, when you previously requested an ELF file with debug info, you specified optimization level 1, I changed your code-quoted compiler command from "-O3" to "-O1" figuring it was merely an oversight.

Notes on changes to sdkconfig from default:
Bootloader config -> Bootloader log verbosity (Verbose)
Serial flasher config -> Flash size (4 MB)

I left the flash and monitor baud rates at default (115200 & 74880, respectively).

hello build:
Code: [Select]
#hello> ~/eDevel/Embedded/esp/8266/fpc/compiler/ppcrossxtensa -Fu~/eDevel/Embedded/esp/8266/fpc/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -O1 -gw3 -Wpesp8266 -WP3.4 -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf-libs -Fl$IDF_PATH/components/esp8266/lib -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib hello
Free Pascal Compiler version 3.3.1 [2022/01/13] for xtensa
Copyright (c) 1993-2021 by Florian Klaempfl and others
Target OS: FreeRTOS
Compiling hello.pas
Assembling hello
Linking hello
esptool.py v2.4.0
5 lines compiled, 2.7 sec, 105266 bytes code, 68 bytes data

hello2 build:
Code: [Select]
#hello2> ~/eDevel/Embedded/esp/8266/fpc/compiler/ppcrossxtensa -Fu~/eDevel/Embedded/esp/8266/fpc/rtl/units/xtensa-freertos/ -Tfreertos -XPxtensa-lx106-elf- -O1 -Wpesp8266 -WP3.4 -Fl~/eDevel/Embedded/esp/fpc-esp8266-idf-3.4/libs -Fl~/eDevel/Embedded/esp/xtensa-lx106-elf/xtensa-lx106-elf/lib -gw3 hello
Free Pascal Compiler version 3.3.1 [2022/01/13] for xtensa
Copyright (c) 1993-2021 by Florian Klaempfl and others
Target OS: FreeRTOS
Compiling hello.pas
Assembling hello
Linking hello
esptool.py v2.4.0
5 lines compiled, 2.0 sec, 111562 bytes code, 68 bytes data
(I had to remove the framework option to get it to link; otherwise it complained about not finding linker script file esp8266.peripherals.ld)

My compiler and tools versions:
Code: [Select]
#> 8266/fpc/compiler/ppcrossxtensa -iWD
3.3.1 2022/01/13
#> xtensa-lx106-elf/bin/xtensa-lx106-elf-ld -v
GNU ld (crosstool-NG esp-2020r3-49-gd5524c1) 2.31.1

Edit: I forgot to mention that my sdkconfig has the USB path set to ttyUSB1.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 17, 2022, 12:43:46 am
Well ... I found something that works*. Use Debian (or probably any Debian-based distro).

* At least I think it worked. Is it expected to see "_haltproc called, exit code: 0" on the monitor after "Hello world" is written?

I tried a "live" Debian ISO image after trying a "live" Fedora image with no success.

Now the question is:
Why does it work on Debian 11.2.0 but won't work on Fedora 35 or openSUSE Leap 15.3?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on January 17, 2022, 10:01:25 pm
Well ... I found something that works*. Use Debian (or probably any Debian-based distro).
I'm using a Debian derivative (Linux Mint)...

Quote
* At least I think it worked. Is it expected to see "_haltproc called, exit code: 0" on the monitor after "Hello world" is written?
Yes, that is correct.  Your simple hello program calls writeln, then exits. The default RTL action when your Pascal program exits main is to write the exit code (0 = no error). I am glad you finally got some output!

Quote
I tried a "live" Debian ISO image after trying a "live" Fedora image with no success.

Now the question is:
Why does it work on Debian 11.2.0 but won't work on Fedora 35 or openSUSE Leap 15.3?
No idea.  Just as I am none the wiser after trying to debug your executables.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: botster on January 18, 2022, 01:52:38 am
Yes, I did get some output, finally! Unfortunately for me, it's not worth switching to Debian or any of its flavors.

There is a difference in the ELF files (the Debian-generated/working and the openSUSE-generated/non-working) that I find interesting. The deb/working ELF has only 3 program segments/sections. The other has 4. That section is listed as a NOTE and has the very same offset and address as section 01 (the iram section).

Code: [Select]
user@linux-desktop:~/deb/esp/hello> readelf -l hello.elf

Elf file type is EXEC (Executable file)
Entry point 0x40212c5c
There are 3 program headers, starting at offset 52

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  LOAD           0x001000 0x3ffe8000 0x3ffe8000 0x00634 0x01dc0 RW  0x1000
  LOAD           0x002000 0x40100000 0x40100000 0x04783 0x04990 RWE 0x1000
  LOAD           0x007010 0x40210010 0x40210010 0x1f388 0x1f388 RWE 0x1000

 Section to Segment mapping:
  Segment Sections...
   00     .data .dram0.data .dram0.bss
   01     .iram0.vectors .iram0.text .iram0.bss
   02     .flash.text .flash.rodata

Code: [Select]
user@linux-desktop:~/eDevel/Embedded/esp/hello> readelf -l hello.elf

Elf file type is EXEC (Executable file)
Entry point 0x40212fa4
There are 4 program headers, starting at offset 52

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  LOAD           0x001000 0x3ffe8000 0x3ffe8000 0x00634 0x01dc0 RW  0x1000
  LOAD           0x002000 0x40100000 0x40100000 0x047a3 0x049b0 RWE 0x1000
  LOAD           0x007010 0x40210010 0x40210010 0x1f22c 0x1f22c RWE 0x1000
  NOTE           0x002000 0x40100000 0x40100000 0x00024 0x00024 R   0x4

 Section to Segment mapping:
  Segment Sections...
   00     .data .dram0.data .dram0.bss
   01     .note.gnu.build-id .iram0.vectors .iram0.text .iram0.bss
   02     .flash.text .flash.rodata
   03     .note.gnu.build-id

I don't understand enough about what I'm looking at there to know if that means anything. So, I'll have to leave it there.

Thank you, ccrause, for your help and patience.  :)
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on August 17, 2022, 04:49:05 am
hello friend, i did on windows using latest fpcupdeluxe, open blink sample from ccrause github, i got following wrong ppu error, how to eliminate this problem?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on August 17, 2022, 07:57:18 am
hello friend, i did on windows using latest fpcupdeluxe, open blink sample from ccrause github, i got following wrong ppu error, how to eliminate this problem?

As a quick test add -Cfhard to your project's Custom Options tab and check if the compiler loads the system unit.

The second line of the output you showed indicates that the RTL system unit was compiled with an FPU setting different from your project build settings. To fix this error requires that the initial build mode used by fpcupdeluxe to build the compiler and RTL and the build mode used by your project should match (specifically the FPU mode set by the command line option -Cf). Can you show the build settings in Lazarus (Project > Project Options > Show Options) and also the fpc.cfg file generated by fpcupdeluxe?

Also, can you re-install the xtensa cross compiler and copy the build log - this will show the FPU mode specified for the RTL.

This will be a lot of information, you can attach it as files to a reply to this thread.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on August 18, 2022, 01:14:12 am
Thank you ccrause, this one is my following fpc setting
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on August 18, 2022, 08:02:49 am
I suspect there is a subtle bug in fpcupdeluxe. By default fpcupdeluxe installs both the lx6 and lx106 sub architectures (esp32 & esp8266 respectively), but does not add the -Cfhard compiler option when compiling the lx6 RTL:
/home/christo/fpcupdeluxe/working/fpc/bin/x86_64-linux/ppcrossxtensa -Cplx6 -Ur -Tfreertos -Pxtensa -XPxtensa-esp32-elf- -Ur -Xs -O2 -n -Fi../inc -Fi../xtensa -FD/home/christo/fpcupdeluxe/working/cross/bin/xtensa-freertos/bin -FE. -FU/home/christo/fpcupdeluxe/working/fpcsrc/rtl/units/xtensa-freertos -vw-n-h-l-d-u-t-p-c- -dxtensa -dRELEASE -WP4.3.2 -XPxtensa-esp32-elf- -Xd -Fl/home/christo/fpcupdeluxe/working/cross/lib/xtensa-freertos/lx6  -Us -Sg system.pp @system.cfg

To fix this, reinstall the xtensa cross compiler, but click on Setup+, click on the Subarch tab, select lx6 and add -Cfhard to Cross Build Options Override, click OK and click on Install cross-compiler.  See attached picture.
 
After building the cross compiler, scroll up in the output view and verify that -Cfhard was added to the compiler command when building the cross RTL:
/home/christo/fpcupdeluxe/working/fpc/bin/x86_64-linux/ppcrossxtensa -Cplx6 -Ur -Tfreertos -Pxtensa -XPxtensa-esp32-elf- -Ur -Xs -O2 -n -Fi../inc -Fi../xtensa -FD/home/christo/fpcupdeluxe/working/cross/bin/xtensa-freertos/bin -FE. -FU/home/christo/fpcupdeluxe/working/fpcsrc/rtl/units/xtensa-freertos -vw-n-h-l-d-u-t-p-c- -dxtensa -dRELEASE -Cfhard -WP4.3.2 -XPxtensa-esp32-elf- -Xd -Fl/home/christo/fpcupdeluxe/working/cross/lib/xtensa-freertos/lx6  -Us -Sg system.pp @system.cfg

If this fixes your problem, this should be reported (https://github.com/LongDirtyAnimAlf/fpcupdeluxe/issues) so that fpcupdeluxe can be improved.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on August 18, 2022, 11:11:41 am
thanks ccrause for your help, but it still got error result. i try open another sample.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on August 18, 2022, 02:07:56 pm
thanks ccrause for your help, but it still got error result. i try open another sample.
At least you have progressed to a new error :).

From the compiler output it is clear that linking failed because some files could not be located (a linker script and some esp-idf libraries).  Can you search for the following files in your fpcupdeluxe folder and show the full paths (these are the Linux names, hopefully it is the same in Windows):

The problem may simply be that the fpc.cfg file is pointing to the wrong folders - if so it is easy to fix.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on August 19, 2022, 02:02:27 am
at which folder of this fpc.cfg must be change? i already to include that containing folder via project option but no luck  :)
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on August 19, 2022, 07:44:47 am
at which folder of this fpc.cfg must be change? i already to include that containing folder via project option but no luck  :)

Looking at your fpc.cfg for LX6 shows some missing entries.  Here is my fpc.cfg, generated by fpcupdeluxe (development version) on Linux (which does work):
Code: Text  [Select][+][-]
  1. # begin fpcup do not remove xtensa-freertos
  2. # Inserted by fpcup 18-8-22 07:24:59
  3. # Cross compile settings dependent on both target OS and target CPU
  4. #IFDEF FPC_CROSSCOMPILING
  5. #IFDEF FREERTOS
  6. #IFDEF CPUXTENSA
  7. #IFDEF CPULX6
  8. -Cfhard
  9. -FD/home/christo/fpcupdeluxe/working/cross/bin/xtensa-freertos/bin/
  10. -XPxtensa-esp32-elf-
  11. -Wpesp32
  12. -Ff/home/christo/fpcupdeluxe/working/cross/bin/xtensa-freertos/esp-idf-4.3.2
  13. -Fl/home/christo/fpcupdeluxe/working/cross/bin/xtensa-freertos/esp-idf-4.3.2/components/esp_rom/esp32/ld/
  14. -Fl/home/christo/fpcupdeluxe/working/cross/bin/xtensa-freertos/esp-idf-4.3.2/components/esp32/ld/
  15. -Fl/home/christo/fpcupdeluxe/working/cross/lib/xtensa-freertos/lx6/
  16. -WP4.3.2
  17. #ENDIF CPULX6

The missing entries in your config seem to refer to cross\bin\xtensa-freertos\esp-idf-4.3.2/.  Can you confirm that this folder exists in your fpcupdeluxe folder?

As far as I know the precompiled libraries for esp-idf is not available on Windows, see this post (https://forum.lazarus.freepascal.org/index.php/topic,57725.msg429504.html#msg429504).  The reason is that the current script used to automatically generate the SDK snapshots are POSIX (Linux/MacOS) specific.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on August 19, 2022, 12:02:46 pm
the folder no exists -> cross\bin\xtensa-freertos\esp-idf-4.3.2/ .
i included from Fl project option, got bad value.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on August 19, 2022, 12:31:46 pm
the folder no exists -> cross\bin\xtensa-freertos\esp-idf-4.3.2/ .

I will try to build a Windows snapshot of esp-idf this weekend.  This will take a while, since I mainly work on Linux.  The Windows PC I have access to is old and slow...
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on August 19, 2022, 01:13:56 pm
Thank you, ccrause. i built a lot esp based project but using c++, i did not know if got fpc-idf, i hope i could replace my c++ esp code with pascal soon.

I already tried pi pico on fpc, it has good hex size compared to arduino based.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on August 20, 2022, 11:01:30 pm
As a start, you can install esp-idf following these instructions (https://docs.espressif.com/projects/esp-idf/en/v4.3.3/esp32/get-started/windows-setup.html#get-started-windows-tools-installer). For now select esp-idf version 4.3.3, this is virtually the same as v 4.3.2 tested with fpcupdeluxe.  The newer release 4.4 should also work, but was not tested as much.

Then build the blink example in the esp-idf/examples/get-started/blink for esp32, starting with one of the preconfigured ESP-IDF 4.3 CMD or ESP-IDF 4.3 PowerShell shortcuts to configure the environment. Use the build command idf.py build.

Copy all the libraries in the examples\get-started\blink\build\esp-idf  folder into a separate blink\build\libs folder (an easy way is to open the blink\build\esp-idf folder in file explorer, search for *.a, copy the search results into a folder named blink\build\libs).

Also copy the following files (used later to flash the bootloader and flash partition scheme) into libs:
blink\build\bootloader\bootloader.bin
blink\build\partition_table\partition-table.bin

And these files to libs:
blink\build\esp-idf\esp32\esp32_out.ld
blink\build\esp-idf\esp32\ld\esp32.project.ld
blink\build\config\sdkconfig.h

Copy other libraries from the esp-idf\components folder (for my install settings : C:\Espressif\frameworks\esp-idf-v4.3.3\components) to libs:
components\esp_wifi\lib\esp32\*.a
components\xtensa\esp32\libxt_hal.a

Now modify the CPULX6 section in fpc.cfg to point to this new libs folder.  Also change some other settings to point to the Espressif installed bin tools and point the compiler to the esp-idf folder:
Code: Text  [Select][+][-]
  1. #IFDEF CPULX6
  2. -Cfhard
  3. -FDC:\Espressif\tools\xtensa-esp32-elf\esp-2021r2-patch3-8.4.0\xtensa-esp32-elf\bin
  4. -XPxtensa-esp32-elf-
  5. -Wpesp32
  6. -FlC:\fpcupdeluxe\cross\lib\xtensa-freertos\lx6\
  7. -WP4.3.3
  8.  
  9. # Library paths to GCC supplied libraries
  10. -FlC:\Espressif\tools\xtensa-esp32-elf\esp-2021r2-patch3-8.4.0\xtensa-esp32-elf\lib\gcc\xtensa-esp32-elf\8.4.0\no-rtti
  11. -FlC:\Espressif\tools\xtensa-esp32-elf\esp-2021r2-patch3-8.4.0\xtensa-esp32-elf\xtensa-esp32-elf\lib\no-rtti
  12.  
  13. # Custom folder with esp-idf libs
  14. -FlC:\Espressif\frameworks\esp-idf-v4.3.3\examples\get-started\blink\build\libs
  15.  
  16. # Set path to esp-idf root
  17. -FfC:\Espressif\frameworks\esp-idf-v4.3.3
  18. #ENDIF CPULX6

Note that these folders are specific to my esp-idf installation, adjust as necessary for your installation.

This is obviously a lot of work and easy to miss a file required for successful compilation and linking in FPC.  I am busy writing a batch script to automate this process and build a release that can be installed by fpcupdeluxe, but it will be a couple of days to get all of this sorted out.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on August 23, 2022, 02:59:08 am
OK and thank you for your time replying this thread, soon i would report my progress here.  :D
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on August 28, 2022, 01:33:11 pm
You can download a snapshot of esp-idf v4.3.3 here: https://github.com/ccrause/fpc-esp-freertos/raw/master/snapshot/esp-idf-4.3.3-win64-20220828.zip

Please follow the instructions in the included README file to update an xtensa-freertos installation by fpcupdeluxe.  Good luck, and please give feedback, if this snapshot is working I can ask that this is included in newer versions of fpcupdeluxe.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on September 03, 2022, 01:00:50 am
i surrender  :D, c++ is more easy  :D

This one is example of my hardware developed with c++ esp based, and for the android client using fpc-LAMW
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on September 03, 2022, 07:42:27 am
i surrender  :D, c++ is more easy  :D
Do you mean C++ is easier to program in, or that using the native esp-idf build environment is easier to use?  I guess it is the latter case, else you wouldn't have used LAMW for the Android app?

Have you tried the esp-idf library snapshot in my previous post?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on September 03, 2022, 08:49:40 am
I already test, but not succed, c++ is easy because a lots contributor n examples + easy environment, pascal not easy in setting up environment, if were ready to use lazarus IDE packed with ready to use environment would be much easier for noobie like me. This situation is just like first time LAMW launch, no one succed to use it, but now just got better n better.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on October 01, 2022, 08:26:24 am
Hello friend, i go this message on my newly updated ubuntu, on ubuntu 18 libgc 2.6 cannot be installed so i upgraded my linux and got this message:
refreshing outdated venv, if you see this on every compile then create an issue on https://github.com/michael-ring/espsdk4fpc/issues

env. ubuntu 20, pip already install but cannot detect.

Thank you.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on October 01, 2022, 08:36:54 am
Hello friend, i go this message on my newly updated ubuntu, on ubuntu 18 libgc 2.6 cannot be installed so i upgraded my linux and got this message:
refreshing outdated venv, if you see this on every compile then create an issue on https://github.com/michael-ring/espsdk4fpc/issues

env. ubuntu 20, pip already install but cannot detect.

Thank you.
It is possible that some of the required python packages were not installed or at an older version, so it may update on first compile.  Do you see the message one every compile? 

Also can you copy the whole message, including the python/pip related output?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on October 01, 2022, 11:38:24 am
Hello friend, i go this message on my newly updated ubuntu, on ubuntu 18 libgc 2.6 cannot be installed so i upgraded my linux and got this message:
refreshing outdated venv, if you see this on every compile then create an issue on https://github.com/michael-ring/espsdk4fpc/issues

env. ubuntu 20, pip already install but cannot detect.

Thank you.
It is possible that some of the required python packages were not installed or at an older version, so it may update on first compile.  Do you see the message one every compile? 

Also can you copy the whole message, including the python/pip related output?

i thought this was because of libgc 2.65, i upgraded all my ubuntu from 18 to 20, tried installing new lazarus + new cross + subarchs, arm + avr are OK but i got this on extensa:

this are my 6th install for this day, and has no luck  %), may be windows are my best friend for mcu programming.

Code: Pascal  [Select][+][-]
  1. Going to install a cross-compiler from available sources.
  2. Fpcupdeluxe: FPC cross-builder: Building compiler for freertos-xtensa [CROSSOPT: -Cfhard] {SUBARCH: lx6}.
  3. FPCUP(deluxe) is starting up.
  4.  
  5. FPCupdeluxe basedir:       /home/ubuntu/fpcupdeluxe
  6. Bootstrap dir:             /home/ubuntu/fpcupdeluxe/fpcbootstrap
  7.  
  8. FPC URL:                   https://gitlab.com/freepascal.org/fpc/source
  9. FPC source directory:      /home/ubuntu/fpcupdeluxe/fpcsrc
  10. FPC install directory:     /home/ubuntu/fpcupdeluxe/fpc
  11. FPC options:              
  12.  
  13. Lazarus URL:               https://gitlab.com/freepascal.org/lazarus/lazarus
  14. Lazarus source directory:  /home/ubuntu/fpcupdeluxe/lazarus
  15. Lazarus install directory: /home/ubuntu/fpcupdeluxe/lazarus
  16. Lazarus options:           -g -gl -O1
  17.  
  18. Please stand back and enjoy !
  19.  
  20. 1-10-22 16:35:46: fpcupdeluxe: V438 (20220928) started.
  21. FPCUPdeluxe V2.2.0m for x86_64-linux running on Ubuntu
  22. Build with: FPC 3.2.2 on Win10 x86_64
  23.  
  24. Found valid as application.
  25. Found valid gunzip application.
  26. Found valid tar application.
  27. Found valid make application.
  28. fpcupdeluxe: info: FPCCrossInstaller (CleanModule: FPC): Running make compiler_distclean,rtl_distclean twice for target xtensa-freertos
  29. fpcupdeluxe: Executing: /usr/bin/make FPC=/home/ubuntu/fpcupdeluxe/fpc/bin/x86_64-linux/ppcx64 --directory=/home/ubuntu/fpcupdeluxe/fpcsrc FPCMAKE=/home/ubuntu/fpcupdeluxe/fpc/bin/x86_64-linux/fpcmake PPUMOVE=/home/ubuntu/fpcupdeluxe/fpc/bin/x86_64-linux/ppumove FPCDIR=/home/ubuntu/fpcupdeluxe/fpcsrc PREFIX=/home/ubuntu/fpcupdeluxe/fpc INSTALL_PREFIX=/home/ubuntu/fpcupdeluxe/fpc INSTALL_BINDIR=/home/ubuntu/fpcupdeluxe/fpc/bin/x86_64-linux OS_TARGET=freertos CPU_TARGET=xtensa SUBARCH=lx6 compiler_distclean rtl_distclean (working dir: /home/ubuntu/fpcupdeluxe/fpcsrc)
  30. Makefile:215: *** The Makefile doesn't support target xtensa-freertos, please run fpcmake first.  Stop.
  31.  
  32.  
  33. ERROR: Fpcupdeluxe fatal error !
  34. Sequencer (FPCCleanBuildOnly): Failure running fpcupdeluxe: error executing sequence FPCCleanBuildOnly
  35. Sequencer (Only): Failure running fpcupdeluxe: error executing sequence Only
  36. Building cross-tools failed. Aborting.
  37.  
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on October 01, 2022, 01:06:27 pm
Code: Pascal  [Select][+][-]
  1. Makefile:215: *** The Makefile doesn't support target xtensa-freertos, please run fpcmake first.  Stop.
Did you select trunk for the FPC version on the Basic tab of fpcupdeluxe?  Xtensa-freertos is only supported in trunk (also called main).
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on October 02, 2022, 03:03:41 am
Code: Pascal  [Select][+][-]
  1. Makefile:215: *** The Makefile doesn't support target xtensa-freertos, please run fpcmake first.  Stop.
Did you select trunk for the FPC version on the Basic tab of fpcupdeluxe?  Xtensa-freertos is only supported in trunk (also called main).

i used stable one, let me try get ride fpc linux extesa once again this day  :o
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on October 02, 2022, 06:22:11 am
already succed, but after i powering off my cpu, lazarus wont open anymore  :). Thank you for your assistance, i give up.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on October 02, 2022, 07:56:58 am
already succed, but after i powering off my cpu, lazarus wont open anymore  :). Thank you for your assistance, i give up.
Sorry to hear about your problems with Lazarus, I know it is frustrating when things don't work.  Fpcupdeluxe is an actively maintained project and has a dedicated thread (https://forum.lazarus.freepascal.org/index.php?topic=34645.new;topicseen#new) for discussing problems.  You are welcome to post your Lazarus startup problem there (with details on what options you selected in fpcupdeluxe), I'm certain someone will be able to help.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: DonAlfredo on October 02, 2022, 10:40:33 am
+1  :D
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mathias on October 02, 2022, 02:01:48 pm
already succed, but after i powering off my cpu, lazarus wont open anymore  :). Thank you for your assistance, i give up.
Sorry to hear about your problems with Lazarus, I know it is frustrating when things don't work.  Fpcupdeluxe is an actively maintained project and has a dedicated thread (https://forum.lazarus.freepascal.org/index.php?topic=34645.new;topicseen#new) for discussing problems.  You are welcome to post your Lazarus startup problem there (with details on what options you selected in fpcupdeluxe), I'm certain someone will be able to help.
You can also use the issues from GitHub.
https://github.com/LongDirtyAnimAlf/fpcupdeluxe/issues
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on October 03, 2022, 08:32:43 am
already succed, but after i powering off my cpu, lazarus wont open anymore  :). Thank you for your assistance, i give up.
Sorry to hear about your problems with Lazarus, I know it is frustrating when things don't work.  Fpcupdeluxe is an actively maintained project and has a dedicated thread (https://forum.lazarus.freepascal.org/index.php?topic=34645.new;topicseen#new) for discussing problems.  You are welcome to post your Lazarus startup problem there (with details on what options you selected in fpcupdeluxe), I'm certain someone will be able to help.

I want to know what linux do you used by the way? Could you explain your detail env on linux, may be mirroring your env, help me out this problem   :D

I know the problem already if you use ubuntu 20(focal fossa), after you build and assign component your lazarus not work anymore, but it has different story if we build on ubuntu 18, all work ok, but no libgc2.65, installed, those lib are my recent problem on ubuntu 18 for extensa.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on October 03, 2022, 09:52:30 pm
I want to know what linux do you used by the way? Could you explain your detail env on linux, may be mirroring your env, help me out this problem   :D
I run Linux Mint Mate 20.2.  I don't install FPC or Lazarus via the package manager, but have several different versions of both that I compiled from source - this obviously requires a working binary FPC compiler to get going initially.  While I can give more information on my setup, it is specific to my computer and would be difficult to adapt to a generic form.  In general I followed the Linux installation guides for FPC (https://wiki.freepascal.org/Installing_the_Free_Pascal_Compiler#Linux) and Lazarus (https://wiki.freepascal.org/Installing_Lazarus_on_Linux) to get going initially.  Things got a little bit more complicated when I started playing around with cross compilers for embedded targets (because of the different units per subarch).

Quote
I know the problem already if you use ubuntu 20(focal fossa), after you build and assign component your lazarus not work anymore, but it has different story if we build on ubuntu 18, all work ok, but no libgc2.65, installed, those lib are my recent problem on ubuntu 18 for extensa.
I don't understand, libgc is a garbage collector for C/C++, this should not be a requirement for building Lazarus?  Which widget set are you compiling for (GTK2, QT...)? This I think should be discussed under the Lazarus IDE board.  There are many Linux users using Lazarus, getting Lazarus working on Linux should not be difficult once the required library dependencies are installed.

Edit: fixed formatting
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: Mongkey on October 04, 2022, 04:27:10 pm
On ubuntu 18, after linking it got message that i need at least libgc 2.65 to do, since i'm not linux expert, i didn't know what is libgc 2.65 for, after installing ubuntu 20, it problem disapear, because in ubuntu 20 got built in > libgc 2.65.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: krolikbest on June 12, 2023, 11:17:59 am
Hi
Interesting thread, currently I do not have a "free space" for any project in this direction however based on my curiosity, how to use the i2c protocol, does the freertos library already have features to allow i2c communication with extrenal devices (like oled dsplay)? If I try to develop something for esp8266 then for sure would use fpcupdeluxe under Win10, however so far I've not tried xtensa+freertos yet.. so don't know what surprises are waiting for me
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on June 12, 2023, 12:45:35 pm
Hi
Interesting thread, currently I do not have a "free space" for any project in this direction however based on my curiosity, how to use the i2c protocol, does the freertos library already have features to allow i2c communication with extrenal devices (like oled dsplay)?

Yes, see e.g. https://github.com/ccrause/fpc-esp-freertos/blob/master/freertos-fpc/esp8266-idf/i2c.pp
Unfortunately not many i2c device drivers yet...

Quote
If I try to develop something for esp8266 then for sure would use fpcupdeluxe under Win10, however so far I've not tried xtensa+freertos yet.. so don't know what surprises are waiting for me
Unfortunately xtensa on Windows via fpcupdeluxe is not yet supported. One can of course do a manual setup (https://wiki.freepascal.org/Xtensa) on Windows, but it is a little bit involved.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: krolikbest on June 12, 2023, 03:07:15 pm
Thank you for info. According to fpcupdeluxe I see there options to check for xtensa and freertos, so I understand that despite I'm able to check them for installation I would not be able to compile program writen for xtensa (to put it another way-it is not as simply as for example, writing for Raspberry Pi under Windows), right ?
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: ccrause on June 12, 2023, 04:40:19 pm
Thank you for info. According to fpcupdeluxe I see there options to check for xtensa and freertos, so I understand that despite I'm able to check them for installation I would not be able to compile program writen for xtensa (to put it another way-it is not as simply as for example, writing for Raspberry Pi under Windows), right ?

From fpcupdeluxe issue 586 (https://github.com/LongDirtyAnimAlf/fpcupdeluxe/issues/586#issuecomment-1563448088):
Quote
It is because there isn't yet a Windows snapshot, see list of available platform snapshots here: https://github.com/michael-ring/espsdk4fpc/releases/tag/v1.1.0-4

One can package the xtensa bintools and re-use the compiled libraries, but automatically sorting out the python dependencies to run the python tools such as esptool is a bit tricky.

The problem is that there is no prepackaged tools, libraries or virtual python environment for Windows yet.  It is possible to provide the xtensa bintools and SDK libraries, but without the SDK python environment the user wil not be able to link or upload user code (at least not without installing the whole SDK separately).
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: krolikbest on June 12, 2023, 05:38:32 pm
thanks for comprehensive info.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: PascalDragon on June 12, 2023, 09:34:05 pm
If you have Windows 10 or newer you can use WSL and setup the ESP SDK there just as if you'd do it in Linux. And with an up to date Windows you can also forward USB devices to a WSL 2 instance, so that you can flash from Windows as well.
Title: Re: Setting up Xtensa-FreeRTOS for ESP8266
Post by: krolikbest on June 13, 2023, 09:04:07 am
Nice hint. So far I've used Ubuntu under VMware, knowning absolutly nothing about WSL and it seems that the WSL is far better technology.
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