Code generation for Cortex-M4 - "lo register required"

[AndyPreston]

I'm trying to compile a basic test program using a cross compiler for STM32F401CC / ARM / Cortex-M4 using a cross compiler built from trunk hosted on Linux.

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1. fpc -Parm -Tembedded -WpSTM32F401CC -XP$fpctarget-

generates an assembly file as expected but then when it calls

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1. arm-embedded-as -march=armv7e-m -mfpu=softvfp -o test.o  test.s

(arm-embedded-as --> arm-none-eabi-as) reports the following messages:

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1. test.s:11: Error: lo register required -- `stmfd r13!,{r11,r12,r14,r15}'
2. test.s:12: Error: lo register required -- `sub r11,r12,#4'
3. test.s:29: Error: lo register required -- `sub r0,r11,#52'
4. test.s:31: Error: lo register required -- `ldr r1,[r11,#-52]'
5. test.s:32: Error: lo register required -- `ldr r2,[r11,#-48]'
6. test.s:44: Error: unshifted register required -- `and r0,r0,#255'
7. test.s:50: Error: lo register required -- `ldmea r11,{r11,r13,r15}'
8. test.s:67: Error: lo register required -- `stmfd r13!,{r14}'
9. test.s:68: Error: lo register required -- `ldmfd r13!,{r15}'
10. test.s:73: Error: lo register required -- `stmfd r13!,{r14}'
11. test.s:74: Error: lo register required -- `ldmfd r13!,{r15}'
12. test.s:15: Error: invalid offset, target not word aligned (0x00000042)
13. test.s:15: Error: invalid offset, value too big (0x0000003A)
14. test.s:16: Error: invalid offset, target not word aligned (0x00000046)
15. test.s:16: Error: invalid offset, value too big (0x0000003E)
16. test.s:17: Error: invalid offset, target not word aligned (0x0000004A)
17. test.s:17: Error: invalid offset, value too big (0x0000003E)
18. test.s:22: Error: invalid offset, target not word aligned (0x00000052)
19. test.s:22: Error: invalid offset, value too big (0x0000003E)
20. test.s:24: Error: invalid offset, target not word aligned (0x0000004E)
21. test.s:24: Error: invalid offset, value too big (0x00000036)
22. test.s:25: Error: invalid offset, target not word aligned (0x00000056)
23. test.s:25: Error: invalid offset, value too big (0x0000003E)
24. test.s:27: Error: invalid offset, target not word aligned (0x0000004A)
25. test.s:27: Error: invalid offset, value too big (0x0000002E)
26. test.s:33: Error: invalid offset, target not word aligned (0x0000004A)
27. test.s:33: Error: invalid offset, value too big (0x00000026)
28. test.s:37: Error: invalid offset, target not word aligned (0x0000005E)
29. test.s:37: Error: invalid offset, value too big (0x00000032)
30. test.s:38: Error: invalid offset, target not word aligned (0x0000005A)
31. test.s:38: Error: invalid offset, value too big (0x0000002E)
32. test.s:39: Error: invalid offset, target not word aligned (0x00000056)
33. test.s:39: Error: invalid offset, value too big (0x00000026)
34. test.s:41: Error: invalid offset, target not word aligned (0x0000004A)
35. test.s:41: Error: invalid offset, value too big (0x00000016)

my compiler was built with:

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1. CROSSINSTALL=1 OS_TARGET=embedded CPU_TARGET=arm SUBARCH=armv7em

I've had a Google around but can only find old conversations from 2012
https://lists.freepascal.org/pipermail/fpc-devel/2012-October/030182.html
https://lists.freepascal.org/pipermail/fpc-devel/2012-October/030183.html
Saying there may be a problem with fpc generating the "wrong" code in certain circumstances with armv7 ??????

Versions:
arm-embedded-as --> GNU assembler (2.27-9ubuntu1+9) 2.27
fpc --> 3.3.1

If anyone's got any tips on how I can work around (or, better still, fix) this issue I'd greatly appreciate it.

[Jonas Maebe]

Try adding -Cparmv7em. That's what was also used when compiling FPC when you speified SUBARCH=armv7em

[AndyPreston]

-Cparmv7em

Thanks... that seems to have worked.