stm32f103 dma problem [SOLVED]

[MiR]

One more issue that I just saw is:
procedure DMA1_Channel3_global_interrupt; public name 'DMA3_Channel1_global_interrupt';  interrupt;
procedure DMA1_Channel4_global_interrupt;  public name 'DMA4_Channel1_global_interrupt';  interrupt;
procedure DMA1_Channel5_global_interrupt; public name 'DMA5_Channel1_global_interrupt';  interrupt;

look at the public names, they are wrong so there is actually no Interrupt Handler Handling anything for those Interrupts.

[diego bertotti]

Sorry, cannot read your mind, which code are you talking about, yours or mine?

What I remember from your code is that you enabled Hardware Handshake, no Handshake->no transmit.

You have now a fairly stripped down example from me, when having issues, please create a minimalistic example that only does what needs to be done. Then I (and very likely also others) are happy to help.

Sorry, cannot read your mind, which code are you talking about, yours or mine?-> mine, sorry

What I remember from your code is that you enabled Hardware Handshake, no Handshake->no transmit.-> Usart1 and USART3 are without handshake. Only on usart2 and its working because i only use rts signal to use an rs485 half duplex line driver , then really don't stop usart work. but remember, only on usart2 and its working. must be another thing

again and again thank you very much

[diego bertotti]

hi

i found the reason o f varios problem i have, even in bare metal way, but now these are solved with the folowing code.

Code: Pascal  [Select][+][-]

1.  
2. procedure DMA1_Channel4_global_interrupt;  public name 'DMA1_Channel4_global_interrupt';  interrupt;
3. Begin
4.     If DMA1.ISR and (Not DMA1_FLAG_TC4) > 0 then
5.         begin
6.         PDMARegisters := @DMA1 + $44;   //CCR4
7.         PDMARegisters^:= PDMARegisters^ AND not %1;
8.         end;
9.     if contador <= contador2 then LedC[13] := not LedC[13] else LedC[13] := true;
10.     DMA1.IFCR:= DMA1_FLAG_GL4;
11. end;
12.  
13.  
14.   GPIO_InitStruct.GPIO_Pin:= GPIO_Pin_10; //TX USART3
15.   GPIO_InitStruct.GPIO_Mode:= GPIO_Mode_AF_PP;
16.   GPIO_InitStruct.GPIO_Speed:= GPIO_Speed_2MHz;
17.   GPIO_Init(PortB, GPIO_InitStruct);
18.  
19. TXBuffer3[0]:= byte('n');
20.  TXBuffer3[1]:= byte('o');
21.  TXBuffer3[2]:= byte(' ');
22.  TXBuffer3[3]:= byte('s');
23.  TXBuffer3[4]:= byte('e');
24.  
25.  
26.  PDMARegisters := @DMA1 + $1C;   //CCR2
27.  PDMARegisters^:= %000000010110110; //minc circ dir htie tcie
28.  PDMARegisters := @DMA1 + $20;   //CNDTR2
29.  PDMARegisters^:= 10;
30.  PDMARegisters := @DMA1 + $24;   //CPAR2
31.  PDMARegisters^:= LongWord(@Usart3.DR);
32.  PDMARegisters := @DMA1 + $28;   //CMAR2
33.  PDMARegisters^:= LongWord(@TXBuffer3);
34.  
35.  USART3.BRR:= 5000 shl 4; //9600bps
36.  Usart3.CR1:= %10000001001000;  //usart enable, TCIE, TE
37.  Usart3.CR2:=  0;
38.  Usart3.CR3:= Usart3.CR3 or %10000000; //DMAT
39.  
40.  Usart3.SR:= Usart3.SR and (not Usart_flag_tc); //clear TC
41.  PDMARegisters := @DMA1 + $1C;   //CCR2
42.  PDMARegisters^:= PDMARegisters^ or %1;   //DMA channel enable
43.  
44.   //***************************************************
45.   //******************** Systick **********************
46.   Systick.LOAD:= 6000;   // 1ms main loop
47.   SysTick.CTRL := SysTick.CTRL or CTRL_TICKINT_Set AND (not 4);// interrupt, AHB/8
48.   SysTick.CTRL := SysTick.CTRL or systick_counter_enable ; //enabled  
49.  
50. while true do
51.     begin
52.   If marca then
53.     begin
54.     marca:= False;
55.     Inc(Contador);
56.     Inc(Contador_tick_Segundos);
57.     If Contador_tick_segundos >= 10 then
58.         begin
59.         Contador_tick_segundos:= 0;
60. //++++++++++++++++++ one second pulse routine +++++++++++
61.         PDMARegisters := @DMA1 + $1c;   //CCR2
62.         PDMARegisters^:= %000000010110110; //minc circ dir htie tcie
63.         PDMARegisters := @DMA1 + $20;   //CNDTR2
64.         PDMARegisters^:= 10;
65.         PDMARegisters := @DMA1 + $24;   //CPAR2
66.         PDMARegisters^:= LongWord(@Usart3.DR);
67.         PDMARegisters := @DMA1 + $28;   //CMAR2
68.         PDMARegisters^:= LongWord(@TXBuffer3);
69.         Usart3.SR:= Usart3.SR and (not usart_flag_tc); //clear TC
70.         PDMARegisters := @DMA1 + $1C;   //CCR2
71.         PDMARegisters^:= PDMARegisters^ or %1;   //DMA channel enable
72.         end;
73.     //if contador and 01 = 0 then LedC[13] := not LedC[13] else LedC[13] := true;
74.     //if contador <= contador2 then LedC[13] := not LedC[13] else LedC[13] := true;
75.     if contador >= cuenta_Max then
76.       begin
77.       contador := 0;
78.       if subiendo then contador2 += 2 else contador2 -= 2;
79.       if contador2 > Cuenta_max then subiendo:= false;
80.       if contador2 = 0 then subiendo:= true;
81.       end;
82.     end;
83.  
84.  
85.     end;
86.  
87.  
88.  

But still USART3 don't push out bits in the PB10 pin. I do a trick flasing internal led every time usart3 dma interrupt, and led flash!!!, but data isnt in the tx pin

with the same code, i can see a busrt of data outputing using usart1 and usart2

[MiR]

What is your expectation now?

Would you like help with the problem?

If yes, please provide complete code that shows the problem in a minimalistic way so others can reproduce without guessing which other code to add to make your incomplete code snippet work.

MiR

[diego bertotti]

hello

my apologize. i'll not disturb you anymore.

I just want to share with all the solution of the problem i have before, and get some help with new one.

Code: Pascal  [Select][+][-]

1.  
2. procedure DMA1_Channel4_global_interrupt;  public name 'DMA1_Channel4_global_interrupt';  interrupt;
3. Begin
4.        your code here
5.         ---->   DMA1.IFCR:= DMA1_FLAG_GL4; <---------
6.        //dmaregisters.ifcr:= $0FFFFFFF; my previous mistake!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
7. end;
8.  
9.  

again thanks

[diego bertotti]

I forgot in my last post that when an interrupt is not configured in nvic it does not fire....

The problem was indeed the 16-bit alignment of the fields, the processor creates an exception when the CNDTR field is accessed as HalfWord (16 Bits).

@Jeppe: Do you think you can patch this in the unit code @Trunk?
While at it, how do you think about changing the array index for dma from [0..6] to [1..7], that creates perhaps less confusion

So I stripped down your code and created this working example:

Code: Pascal  [Select][+][-]

1. program torque_vfd_comm;
2.  
3. uses cortexm3, stm32f103fw;
4. {$O-}
5.  
6. const
7.   Serial_buffer_size = 7;
8.   DMA_CHANNEL4 = 3;
9.   PERIPH_BASE   = $40000000;
10.   AHBPERIPH_BASE= PERIPH_BASE + $00020000;
11.   DMA1_Channel4_BASE= AHBPERIPH_BASE + $00000044;
12.  
13. type
14.   TDMA_Channel_Registers = record
15.     CCR         : longword;
16.     CNDTR       : longword;
17.     CPAR        : longword;
18.     CMAR        : longword;
19.   end;
20.  
21. var
22.   TXBuffer1: Array [0..Serial_buffer_size-1] of byte;
23.   Usart_ini: TUSART_InitTypeDef;
24.   NVIC_Ini: TNVIC_InitTypeDef;
25.   GPIO_InitStruct: TGPIO_InitTypeDef;
26.   RCC_Clocks: TRCC_ClocksTypeDef;
27.   DMA1_Channel4 : TDMA_Channel_Registers absolute DMA1_Channel4_BASE;
28.   i : integer;
29.  
30. procedure DMA1_Channel4_global_interrupt;  public name 'DMA4_Channel1_global_interrupt';  interrupt;
31. Begin
32.   dma1.ifcr:= $0FFFFFFF;
33. end;
34.  
35. procedure USART1_SendBytesViaDMA(var Data : array of byte; const count : integer = -1);
36. begin
37.   //Disable DMA, Transfer Complete IRQ Read from Memory No Circular Mode No Periph Inc Memory Inc 8bit periph 8bit mem prio0
38.   DMA1_Channel4.CCR := %000000010010010;
39.   if count=-1 then
40.     DMA1_Channel4.CNDTR := High(Data)+1
41.   else
42.     DMA1_Channel4.CNDTR := Count;
43.   DMA1_Channel4.CPAR :=  LongWord(@Usart1.DR);
44.   DMA1_Channel4.CMAR := LongWord(@Data);
45.   DMA1_Channel4.CCR := DMA1_Channel4.CCR or %1;   //enable
46. end;
47.  
48. begin
49.   //************************************************
50.   //**************** RCC  *************************
51.   //FLASH_SetLatency(1);
52.   RCC_HSICmd(Enabled);
53.   RCC_DeInit;
54.   RCC_HSICmd(Enabled);
55.   //For simplicity run on 8MHz internal Clock
56.   RCC_HCLKConfig(RCC_SYSCLK_Div1);
57.   RCC_PCLK1Config(RCC_HCLK_Div2); //24MHz
58.   RCC_PCLK2Config(RCC_HCLK_Div1); //48MHz
59.   RCC_AHBPeriphClockCmd( RCC_AHBPeriph_DMA1 or RCC_AHBPeriph_SRAM or RCC_AHBPeriph_FLITF, Enabled);
60.   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ALL, Enabled);
61.   RCC_APB1PeriphClockCmd(RCC_APB1Periph_ALL, Enabled);
62.   RCC_GetClocksFreq(RCC_Clocks);
63.  
64.   GPIO_InitStruct.GPIO_Pin:= GPIO_Pin_9; //TX USART1
65.   GPIO_InitStruct.GPIO_Mode:= GPIO_Mode_AF_PP;
66.   GPIO_InitStruct.GPIO_Speed:= GPIO_Speed_2MHz;
67.   GPIO_Init(PortA, GPIO_InitStruct);
68.  
69.   //************************************************
70.   //**************** USART *************************
71.  
72.   Usart_ini.USART_BaudRate:= 9600;
73.   Usart_ini.USART_WordLength:= USART_WordLength_8b;
74.   Usart_ini.USART_StopBits:= USART_StopBits_1;
75.   Usart_ini.USART_Parity:= USART_Parity_No;
76.   Usart_ini.USART_Mode:= USART_Mode_Tx;
77.   Usart_ini.USART_HardwareFlowControl:= USART_HardwareFlowControl_None;
78.   Usart_ini.USART_Clock:= USART_Clock_Disable;
79.   Usart_ini.USART_CPOL:= USART_CPOL_Low;
80.   Usart_ini.USART_CPHA:= USART_CPHA_1Edge;
81.   Usart_ini.USART_LastBit:= USART_LastBit_Disable;
82.   USART_Init(USart1, Usart_ini);
83.  
84.   USART_DMACmd(Usart1,USART_DMAReq_Tx,Enabled);
85.  
86.   Usart_Cmd(Usart1, ENABLED);
87.  
88.   //************************************************
89.   //**************** NVIC **************************
90.   NVIC_Ini.NVIC_IRQChannelPreemptionPriority:= 0;
91.   NVIC_Ini.NVIC_IRQChannelSubPriority:= 0;
92.   NVIC_Ini.NVIC_IRQChannel:= DMAChannel4_IRQChannel;
93.   NVIC_Init(NVIC_Ini);
94.   NVIC_Ini.NVIC_IRQChannelCmd := Enabled;
95.  
96.   TXBuffer1[0] := byte('h');
97.   TXBuffer1[1] := byte('e');
98.   TXBuffer1[2] := byte('l');
99.   TXBuffer1[3] := byte('l');
100.   TXBuffer1[4] := byte('o');
101.   TXBuffer1[5] := byte(#13);
102.   TXBuffer1[6] := byte(#10);
103.  
104.   while true do
105.   begin
106.     USART1_SendBytesViaDMA(TXBuffer1);
107.     //Quick hack, wait for tramsfer done....
108.     repeat
109.     until DMA1_Channel4.CNDTR = 0;
110.     //now waste some time so that we better see when transfer starts again
111.     for i := 1 to 100000 do
112.       ;
113.  
114.   end;
115. end.
116.  

i will try your code, but modified to use usart3 and ill see what happens[/code]

[diego bertotti]

ok now the results

Code: Pascal  [Select][+][-]

1.  
2. program torque_vfd_comm;
3.  
4. uses cortexm3, stm32f103fw;
5. {$O-}
6.  
7. const
8.   Serial_buffer_size = 7;
9.   DMA_CHANNEL4 = 3;
10.   PERIPH_BASE   = $40000000;
11.   AHBPERIPH_BASE= PERIPH_BASE + $00020000;
12.   DMA1_Channel2_BASE= AHBPERIPH_BASE + $0000001C;
13.   DMA1_Channel4_BASE= AHBPERIPH_BASE + $00000044;
14.  
15. type
16.   TDMA_Channel_Registers = record
17.     CCR         : longword;
18.     CNDTR       : longword;
19.     CPAR        : longword;
20.     CMAR        : longword;
21.   end;
22.  
23. var
24.   TXBuffer1: Array [0..Serial_buffer_size-1] of byte;
25.   TXBuffer3: Array [0..Serial_buffer_size-1] of byte;
26.   Usart_ini: TUSART_InitTypeDef;
27.   NVIC_Ini: TNVIC_InitTypeDef;
28.   GPIO_InitStruct: TGPIO_InitTypeDef;
29.   RCC_Clocks: TRCC_ClocksTypeDef;
30.   DMA1_Channel4 : TDMA_Channel_Registers absolute DMA1_Channel4_BASE;  
31.   DMA1_Channel2 : TDMA_Channel_Registers absolute DMA1_Channel2_BASE;
32.   i : integer;
33.  
34. procedure DMA1_Channel2_global_interrupt;  public name 'DMA2_Channel1_global_interrupt';  interrupt;
35. Begin
36.   DMA1.IFCR:= DMA1_FLAG_GL2;
37. end;
38.  
39. procedure DMA1_Channel4_global_interrupt;  public name 'DMA4_Channel1_global_interrupt';  interrupt;
40. Begin
41.   DMA1.IFCR:= DMA1_FLAG_GL4;
42. end;
43.  
44. procedure USART1_SendBytesViaDMA(var Data : array of byte; const count : integer = -1);
45. begin
46.   //Disable DMA, Transfer Complete IRQ Read from Memory No Circular Mode No Periph Inc Memory Inc 8bit periph 8bit mem prio0
47.   DMA1_Channel4.CCR := %000000010010010;
48.   if count=-1 then
49.     DMA1_Channel4.CNDTR := High(Data)+1
50.   else
51.     DMA1_Channel4.CNDTR := Count;
52.   DMA1_Channel4.CPAR :=  LongWord(@Usart1.DR);
53.   DMA1_Channel4.CMAR := LongWord(@Data);
54.   DMA1_Channel4.CCR := DMA1_Channel4.CCR or %1;   //enable
55. end;
56.  
57. procedure USART3_SendBytesViaDMA(var Data : array of byte; const count : integer = -1);
58. begin
59.   //Disable DMA, Transfer Complete IRQ Read from Memory No Circular Mode No Periph Inc Memory Inc 8bit periph 8bit mem prio0
60.   DMA1_Channel2.CCR := %000000010010010;
61.   if count=-1 then
62.     DMA1_Channel2.CNDTR := High(Data)+1
63.   else
64.     DMA1_Channel2.CNDTR := Count;
65.   DMA1_Channel2.CPAR :=  LongWord(@Usart3.DR);
66.   DMA1_Channel2.CMAR := LongWord(@Data);
67.   DMA1_Channel2.CCR := DMA1_Channel2.CCR or %1;   //enable
68. end;
69.  
70. begin
71.   //************************************************
72.   //**************** RCC  *************************
73.   //FLASH_SetLatency(1);
74.   RCC_HSICmd(Enabled);
75.   RCC_DeInit;
76.   RCC_HSICmd(Enabled);
77.   //For simplicity run on 8MHz internal Clock
78.   RCC_HCLKConfig(RCC_SYSCLK_Div1);
79.   RCC_PCLK1Config(RCC_HCLK_Div2); //24MHz
80.   RCC_PCLK2Config(RCC_HCLK_Div1); //48MHz
81.   RCC_AHBPeriphClockCmd( RCC_AHBPeriph_DMA1 or RCC_AHBPeriph_SRAM or RCC_AHBPeriph_FLITF, Enabled);
82.   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ALL, Enabled);
83.   RCC_APB1PeriphClockCmd(RCC_APB1Periph_ALL, Enabled);
84.   RCC_GetClocksFreq(RCC_Clocks);
85.  
86.     GPIO_InitStruct.GPIO_Pin:= GPIO_Pin_9; //TX USART1
87.     GPIO_InitStruct.GPIO_Mode:= GPIO_Mode_AF_PP;
88.     GPIO_InitStruct.GPIO_Speed:= GPIO_Speed_2MHz;
89.     GPIO_Init(PortA, GPIO_InitStruct);
90.  
91.   GPIO_InitStruct.GPIO_Pin:= GPIO_Pin_10; //TX USART3
92.   GPIO_InitStruct.GPIO_Mode:= GPIO_Mode_AF_PP;
93.   GPIO_InitStruct.GPIO_Speed:= GPIO_Speed_2MHz;
94.   GPIO_Init(PortB, GPIO_InitStruct);
95.  
96.   //************************************************
97.   //**************** USART *************************
98.  
99.   Usart_ini.USART_BaudRate:= 9600;
100.   Usart_ini.USART_WordLength:= USART_WordLength_8b;
101.   Usart_ini.USART_StopBits:= USART_StopBits_1;
102.   Usart_ini.USART_Parity:= USART_Parity_No;
103.   Usart_ini.USART_Mode:= USART_Mode_Tx;
104.   Usart_ini.USART_HardwareFlowControl:= USART_HardwareFlowControl_None;
105.   Usart_ini.USART_Clock:= USART_Clock_Disable;
106.   Usart_ini.USART_CPOL:= USART_CPOL_Low;
107.   Usart_ini.USART_CPHA:= USART_CPHA_1Edge;
108.   Usart_ini.USART_LastBit:= USART_LastBit_Disable;
109.   USART_Init(USart1, Usart_ini);
110.   USART_Init(USart3, Usart_ini);
111.  
112.   USART_DMACmd(Usart1,USART_DMAReq_Tx,Enabled);
113.   USART_DMACmd(Usart3,USART_DMAReq_Tx,Enabled);
114.  
115.   Usart_Cmd(Usart1, ENABLED);
116.   Usart_Cmd(Usart3, ENABLED);
117.  
118.   //************************************************
119.   //**************** NVIC **************************
120.   NVIC_Ini.NVIC_IRQChannelPreemptionPriority:= 0;
121.   NVIC_Ini.NVIC_IRQChannelSubPriority:= 0;
122.   NVIC_Ini.NVIC_IRQChannel:= DMAChannel2_IRQChannel;
123.   NVIC_Init(NVIC_Ini);                              
124.   NVIC_Ini.NVIC_IRQChannel:= DMAChannel4_IRQChannel;
125.   NVIC_Init(NVIC_Ini);
126.   NVIC_Ini.NVIC_IRQChannelCmd := Enabled;
127.  
128.  
129.   TXBuffer1[0] := byte('h');
130.   TXBuffer1[1] := byte('o');
131.   TXBuffer1[2] := byte('l');
132.   TXBuffer1[3] := byte('a');
133.   TXBuffer1[4] := byte('1');
134.   TXBuffer1[5] := byte(#13);
135.   TXBuffer1[6] := byte(#10);
136.  
137.   TXBuffer3[0] := byte('h');
138.   TXBuffer3[1] := byte('o');
139.   TXBuffer3[2] := byte('l');
140.   TXBuffer3[3] := byte('a');
141.   TXBuffer3[4] := byte('3');
142.   TXBuffer3[5] := byte(#13);
143.   TXBuffer3[6] := byte(#10);
144.  
145.   while true do
146.   begin
147.     USART1_SendBytesViaDMA(TXBuffer1);
148.     USART3_SendBytesViaDMA(TXBuffer3);
149.     //Quick hack, wait for tramsfer done....
150.     repeat
151.     until (DMA1_Channel2.CNDTR = 0) AND (DMA1_Channel4.CNDTR = 0);
152.     //now waste some time so that we better see when transfer starts again
153.     for i := 1 to 100000 do
154.       ;
155.  
156.   end;
157. end.
158.  
159.  

USART1 run perfectly.

nothing on PB10. it means TX pin of USART3.

work like open drain never activated, means floating pin, or high impedance state

anybody knows why?

thanks

[MiR]

The solution is to only enable Peripherals that are needed. (plus disable synchronous mode on UART when not needed)

From the Errata Sheet of stm32f1xx:

2.9.6 I2C2 with SPI2 and USART3 Conditions

I2C2 and SPI2 are clocked together or I2C2 and USART3 are clocked together
....
USART3 must not be used in synchronous mode when I2C2 is being used.

So having I2C2 enabled kills USART3 function in your case.

When you change the two initialization lines in your last example to:

Code: Pascal  [Select][+][-]

1. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA or RCC_APB2Periph_GPIOB or RCC_APB2Periph_USART1, Enabled);
2. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3+RCC_APB1Periph_PWR, Enabled);
3.  

the example works for both USART1+3 (See Screenshot)

[diego bertotti]

hello

thank you very much!!

i saw the same last night and wanna test it today, but you do it before than me

again thank you

[diego bertotti]

hi

works!!!

i just uncomment this line

Code: Pascal  [Select][+][-]

1. RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2 or RCC_APB1Periph_I2C2 or RCC_APB1Periph_CAN, Disabled);
2.  

in the original code and start to transmit on PB10 pin 

look at the attachment the 3 tx signals of 3 usart

from now rx test and them timers input capture, pwm out, and a/d inputs...and i2c1! lot of work of test and after that the code for the project.

a lot of thanks for support me and for your time